US Patent Application 18362192. MEMORY CHIPLET HAVING MULTIPLE ARRAYS OF MEMORY DEVICES AND METHODS OF FORMING THE SAME simplified abstract
MEMORY CHIPLET HAVING MULTIPLE ARRAYS OF MEMORY DEVICES AND METHODS OF FORMING THE SAME
Organization Name
Taiwan Semiconductor Manufacturing Company Limited
Inventor(s)
Yu-Ming Lin of Hsinchu City (TW)
MEMORY CHIPLET HAVING MULTIPLE ARRAYS OF MEMORY DEVICES AND METHODS OF FORMING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 18362192 titled 'MEMORY CHIPLET HAVING MULTIPLE ARRAYS OF MEMORY DEVICES AND METHODS OF FORMING THE SAME
Simplified Explanation
The patent application describes a memory structure that includes three different types of memory arrays: SRAM, 1T1C, and FeFET.
- The memory structure has a data bus that allows for data transfer between the different memory arrays.
- Peripheral circuit devices are included in the memory structure to control the memory arrays.
- The second and third memory arrays may be 3-dimensional, meaning they have multiple layers of memory cells stacked on top of each other.
Original Abstract Submitted
A disclosed memory structure includes a first memory region including a first memory array of SRAM memory devices, a second memory region including a second memory array of 1T1C memory devices, and a third memory region including a third memory array of FeFET memory devices. The memory structure further includes at least one data bus laterally extending across the first memory region, the second memory region, and third memory region and configured to provide data transfer among the first memory array, the second memory array, and the third memory array. The memory structure further includes a plurality of peripheral circuit devices formed at a semiconductor material layer of the memory structure, the peripheral circuit devices configured to control the first memory array, the second memory array, and the third memory array. At least one of the second memory array and the third memory array may be a 3-dimensional memory array.
