US Patent Application 18361948. Mixed Poly Pitch Design Solution for Power Trim simplified abstract
Contents
Mixed Poly Pitch Design Solution for Power Trim
Organization Name
Taiwan Semiconductor Manufacturing Company Limited
Inventor(s)
Lipen Yuan of Hsinchu County (TW)
Jiann-Tyng Tzeng of Hsinchu City (TW)
Wei-Cheng Lin of Taichung City (TW)
Mixed Poly Pitch Design Solution for Power Trim - A simplified explanation of the abstract
This abstract first appeared for US patent application 18361948 titled 'Mixed Poly Pitch Design Solution for Power Trim
Simplified Explanation
The patent application describes an integrated circuit that has different pitch sizes for its cells.
- The integrated circuit includes a minimum unit that has a certain number of cells with a first pitch size and a different number of cells with a second pitch size.
- The first pitch size and the second pitch size are different from each other, and their greatest common divisor is an integer greater than 1.
- The first pitch size has a gate length of Lg, and the second pitch size has a gate length of Lg1.
- The gate lengths can be extended to achieve G-bias, which optimizes power and speed for the minimum unit and the integrated circuit.
Original Abstract Submitted
An integrated circuit with mixed poly pitch cells with a plurality of different pitch sizes is disclosed. The integrated circuit includes: at least a minimum unit each with at least a first number of first poly pitch cells with a first pitch size, and a second number of second poly pitch cells with a second pitch size, the first pitch size PP is different from the second pitch size PP1, the greatest common divisor of the first pitch size PP and the second pitch size PP1 is GCD, wherein GCD is an integer greater than 1; a gate length of the first pitch size is Lg; a gate length of the second pitch size is Lg1; Lg and Lg1 are capable of being extended to achieve G-bias for power and speed optimization of the minimum unit and the integrated circuit.
