INTEGRATED CHIP WITH GRAPHENE BASED INTERCONNECT

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INTEGRATED CHIP WITH GRAPHENE BASED INTERCONNECT - A simplified explanation of the abstract

This abstract first appeared for US patent application 18360012 titled 'INTEGRATED CHIP WITH GRAPHENE BASED INTERCONNECT

Simplified Explanation

The abstract describes an integrated chip that includes a substrate, conductive features, a cavity, and dielectric materials. The conductive features are separated by the cavity and are made of graphene intercalated with metals. The dielectric liner and cap help seal the cavity and provide a planar surface.

Integrated chip with conductive features made of graphene intercalated with metals
Conductive features are separated by a cavity
Dielectric liner extends along the bottom and sidewalls of the cavity
Dielectric cap covers and seals the cavity, with a planar top surface
Substrate provides a base for the integrated chip

Original Abstract Submitted

The present disclosure relates to an integrated chip. The integrated chip includes a substrate. A first conductive feature is over the substrate. A second conductive feature is over the substrate and is adjacent to the first conductive feature. The first and second conductive features are separated by a cavity. A dielectric liner extends from the first conductive feature to the second conductive feature along a bottom of the cavity and further extends along opposing sidewalls of the first and second conductive features. A dielectric cap covers and seals the cavity. The dielectric cap has a top surface that is approximately planar with top surfaces of the first and second conductive features. The first conductive feature and the second conductive feature comprise graphene intercalated with one or more metals.

US Patent Application 18360012. INTEGRATED CHIP WITH GRAPHENE BASED INTERCONNECT simplified abstract

Contents

INTEGRATED CHIP WITH GRAPHENE BASED INTERCONNECT

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