US Patent Application 18359597. SELF-ALIGNED INNER SPACER ON GATE-ALL-AROUND STRUCTURE AND METHODS OF FORMING THE SAME simplified abstract
SELF-ALIGNED INNER SPACER ON GATE-ALL-AROUND STRUCTURE AND METHODS OF FORMING THE SAME
Organization Name
Taiwan Semiconductor Manufacturing Company, Ltd.
Inventor(s)
Pang-Yen Tsai of Hsin-Chu Hsian (TW)
SELF-ALIGNED INNER SPACER ON GATE-ALL-AROUND STRUCTURE AND METHODS OF FORMING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 18359597 titled 'SELF-ALIGNED INNER SPACER ON GATE-ALL-AROUND STRUCTURE AND METHODS OF FORMING THE SAME
Simplified Explanation
- The patent application describes a semiconductor device and a method for manufacturing it. - The method involves forming a fin structure on a substrate, consisting of two semiconductor layers with different materials, and including a channel region and a source/drain region. - A dummy gate structure is then formed over the substrate and fin. - A portion of the fin in the source/drain region is etched. - The edge portion of the second semiconductor layer in the channel region is selectively removed, causing it to be recessed, while the edge portion of the first semiconductor layer is suspended. - A reflow process is performed on the first semiconductor layer, creating an inner spacer that forms sidewall surfaces of the source/drain region. - Finally, a source/drain feature is epitaxially grown in the source/drain region.
Original Abstract Submitted
Semiconductor device and the manufacturing method thereof are disclosed herein. An exemplary method of forming a semiconductor device comprises forming a fin over a substrate, wherein the fin comprises a first semiconductor layer and a second semiconductor layer comprising different semiconductor materials, and the fin includes a channel region and a source/drain region; forming a dummy gate structure over the substrate and the fin; etching a portion of the fin in the source/drain region; selectively removing an edge portion of the second semiconductor layer in the channel region of the fin such that the second semiconductor layer is recessed, and an edge portion of the first semiconductor layer is suspended; performing a reflow process to the first semiconductor layer to form an inner spacer, wherein the inner spacer forms sidewall surfaces of the source/drain region of the fin; and epitaxially growing a sour/drain feature in the source/drain region.
