US Patent Application 18348757. ELECTRONIC DEVICE AND METHOD FOR CONTROLLING ELECTRONIC DEVICE simplified abstract

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ELECTRONIC DEVICE AND METHOD FOR CONTROLLING ELECTRONIC DEVICE

Organization Name

Samsung Electronics Co., Ltd.


Inventor(s)

Heetae Kim of Suwon-si (KR)


Soongyu Kwon of Suwon-si (KR)


Minsu Kim of Suwon-si (KR)


Sanghyun Ryu of Suwon-si (KR)


ELECTRONIC DEVICE AND METHOD FOR CONTROLLING ELECTRONIC DEVICE - A simplified explanation of the abstract

  • This abstract for appeared for US patent application number 18348757 Titled 'ELECTRONIC DEVICE AND METHOD FOR CONTROLLING ELECTRONIC DEVICE'

Simplified Explanation

This abstract describes an electronic device that includes a battery, a power management module, a charging circuit, and a processor with a central processing unit (CPU) and multiple intellectual property (IP) blocks. The charging circuit is connected to the processor and can output a warning signal for overcurrent through a pin. The power management module is also connected to the processor and can output a reset warning signal through a pin. The processor has a pin that can receive the overcurrent warning signal and is programmed to reduce the clock frequency of the CPU and IP blocks or the operation clock frequency of components in the device when the overcurrent warning signal is received.


Original Abstract Submitted

An electronic device is provided. The electronic device includes a battery, a power management module, a charging circuit, and a processor including a central processing unit (CPU) and a plurality of intellectual property (IP) blocks. The charging circuit is connected to the processor and includes a first pin to output a first overcurrent warning signal. The power management module is connected to the processor and includes a second pin to output a reset warning signal. The processor includes a first general purpose input output (GPIO) pin to receive the first overcurrent warning signal, and is configured to reduce at least one clock frequency among a plurality of clock frequencies set to each of the CPU and the plurality of IP blocks, or reduce at least one operation clock frequency of components inside the electronic device when the first overcurrent warning signal is received through the first GPIO pin.