US Patent Application 18344761. DISCOVERING AN EMBEDDED SUBSCRIBER IDENTIFICATION MODULE ROOT DISCOVERY SERVICE ENDPOINT simplified abstract

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DISCOVERING AN EMBEDDED SUBSCRIBER IDENTIFICATION MODULE ROOT DISCOVERY SERVICE ENDPOINT

Organization Name

Google LLC


Inventor(s)

Aguibou Barry of Mountain View CA (US)


Jean-Philippe Paul Cormier of London (GB)


DISCOVERING AN EMBEDDED SUBSCRIBER IDENTIFICATION MODULE ROOT DISCOVERY SERVICE ENDPOINT - A simplified explanation of the abstract

  • This abstract for appeared for US patent application number 18344761 Titled 'DISCOVERING AN EMBEDDED SUBSCRIBER IDENTIFICATION MODULE ROOT DISCOVERY SERVICE ENDPOINT'

Simplified Explanation

The abstract describes a memory device that consists of a memory cell array block and a control logic. The memory cell array block is made up of multiple layers of memory cells and corresponding word line layers. The block is further divided into two subblocks, each containing a number of layers of memory cells and word line layers. The control logic is connected to the memory cell array block and is responsible for erasing, reading, or programming the memory cells using either a block mode or a subblock mode. When the memory cell array block is being erased, read, or programmed in the subblock mode, the control logic determines the operation strategy for the other subblock based on the state of one of the subblocks.


Original Abstract Submitted

A memory device includes at least one memory cell array block and a control logic. The memory cell array block includes multiple layers of memory cells and word line layers provided corresponding to individual layers of memory cells. The memory cell array block is divided into at least two memory cell array subblocks, each subblock comprising a number of layers of memory cells and word line layers provided corresponding to individual layers of memory cells. The control logic is coupled to the memory cell array block, and configured to: erase, read or program the memory cell array block using a block mode or a subblock mode, and when the memory cell array block is erased, read, or programmed under the subblock mode, determine, at least based on a state of one of the two memory cell array subblocks, an operation strategy of the other memory cell array subblock.