US Patent Application 18303360. SEMICONDUCTOR PACKAGE AND METHOD FOR FABRICATING THE SAME simplified abstract

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SEMICONDUCTOR PACKAGE AND METHOD FOR FABRICATING THE SAME

Organization Name

SAMSUNG ELECTRONICS CO., LTD.==Inventor(s)==

[[Category:Won Hee Hwang of Suwon-si (KR)]]

SEMICONDUCTOR PACKAGE AND METHOD FOR FABRICATING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 18303360 titled 'SEMICONDUCTOR PACKAGE AND METHOD FOR FABRICATING THE SAME

Simplified Explanation

The abstract describes a semiconductor package design that includes multiple layers of semiconductor chips stacked on top of each other with a spacer in between. The design also includes trenches filled with a mold layer.

  • The semiconductor package includes multiple layers of semiconductor chips.
  • The chips are spaced apart from each other in a specific direction.
  • There is a spacer between the topmost and bottommost chips.
  • The design includes trenches that extend in the same direction as the chip spacing.
  • The trenches are filled with a mold layer.


Original Abstract Submitted

A semiconductor package is provided. The semiconductor package includes a substrate; a plurality of first semiconductor chips on the substrate and spaced apart from each other in a first direction; a plurality of second semiconductor chips on the plurality of first semiconductor chips; a spacer between an uppermost one of the plurality of first semiconductor chips and a lowermost one of the plurality of second semiconductor chips, a plurality of trenches extending in the first direction; and a mold layer within the plurality of trenches.

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