US Patent Application 18231830. SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME simplified abstract

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

Organization Name

Semiconductor Energy Laboratory Co., Ltd.

Inventor(s)

Shunpei Yamazaki of Setagaya (JP)

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 18231830 titled 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

Simplified Explanation

The abstract describes a new semiconductor device with a transistor that uses an oxide semiconductor, making it more convenient and reliable for various applications.

• The semiconductor device includes a transistor with a gate electrode layer, a gate insulating layer, and an oxide semiconductor layer on a substrate.
• An insulating layer is placed over the transistor, and a conductive layer is placed over the insulating layer.
• The insulating layer covers the oxide semiconductor layer and is in contact with the gate insulating layer.
• The gate insulating layer and the insulating layer align with each other over the gate electrode layer in the channel width direction of the oxide semiconductor layer.
• The conductive layer covers the channel formation region of the oxide semiconductor layer and the end portions of the gate insulating layer and the insulating layer, and is in contact with the gate electrode layer.

Original Abstract Submitted

A more convenient and highly reliable semiconductor device which has a transistor including an oxide semiconductor with higher impact resistance used for a variety of applications is provided. A semiconductor device has a bottom-gate transistor including a gate electrode layer, a gate insulating layer, and an oxide semiconductor layer over a substrate, an insulating layer over the transistor, and a conductive layer over the insulating layer. The insulating layer covers the oxide semiconductor layer and is in contact with the gate insulating layer. In a channel width direction of the oxide semiconductor layer, end portions of the gate insulating layer and the insulating layer are aligned with each other over the gate electrode layer, and the conductive layer covers a channel formation region of the oxide semiconductor layer and the end portions of the gate insulating layer and the insulating layer and is in contact with the gate electrode layer.