US Patent Application 18230147. VERTICAL SEMICONDUCTOR PACKAGE INCLUDING HORIZONTALLY STACKED DIES AND METHODS OF FORMING THE SAME simplified abstract
Contents
VERTICAL SEMICONDUCTOR PACKAGE INCLUDING HORIZONTALLY STACKED DIES AND METHODS OF FORMING THE SAME
Organization Name
Taiwan Semiconductor Manufacturing Company Limited
Inventor(s)
Jen-Yuan Chang of Hsinchu City (TW)
Chia-Ping Lai of Hsinchu City (TW)
VERTICAL SEMICONDUCTOR PACKAGE INCLUDING HORIZONTALLY STACKED DIES AND METHODS OF FORMING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 18230147 titled 'VERTICAL SEMICONDUCTOR PACKAGE INCLUDING HORIZONTALLY STACKED DIES AND METHODS OF FORMING THE SAME
Simplified Explanation
The patent application describes a semiconductor package that includes a first connection die and a first die stack.
- The first connection die has a semiconductor substrate and an interconnect structure.
- The first die stack is placed on top of the first connection die and consists of stacked dies.
- Each stacked die also has a semiconductor substrate and an interconnect structure.
- The interconnect structure of each stacked die is electrically connected to the interconnect structure of the first connection die.
- The angle between the plane of the first connection die and the plane of each stacked die ranges from about 45° to about 90°.
Original Abstract Submitted
A semiconductor package includes a first connection die including a semiconductor substrate and an interconnect structure, and a first die stack disposed on the first connection die and including stacked dies, each of the stacked dies including a semiconductor substrate and an interconnect structure including a first connection line that is electrically connected to the interconnect structure of the first connection die. An angle formed between a plane of the first connection die and a plane of each stacked die ranges from about 45° to about 90°.