US Patent Application 18227236. HIGH-IMPLANT CHANNEL SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME simplified abstract

HIGH-IMPLANT CHANNEL SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

Organization Name

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor(s)

Chia-Chung Chen of Keelung (TW)

Chi-Feng Huang of Zhubei City (TW)

Victor Chiang Liang of Hsinchu (TW)

Fu-Huan Tsai of Kaohsiung City (TW)

Hsieh-Hung Hsieh of Hsinchu (TW)

Tzu-Jin Yeh of Hsinch City (TW)

Han-Min Tsai of Hsinchu (TW)

Hong-Lin Chu of Hsinchu (TW)

HIGH-IMPLANT CHANNEL SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 18227236 titled 'HIGH-IMPLANT CHANNEL SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

Simplified Explanation

The patent application describes a method for manufacturing a semiconductor device with an upper-channel implant transistor.

• The method involves creating fins on a substrate, with a first region and second regions on either side.
• A dopant is implanted in the upper portion of the first region of the fins, but not in the second regions or lower portion of the first region.
• A gate structure is formed over the first region of the fins, extending in a perpendicular direction.
• Source/drains are formed over the second regions of the fins.
• This process results in the creation of an upper-channel implant transistor.

Original Abstract Submitted

A method for manufacturing a semiconductor device including an upper-channel implant transistor is provided. The method includes forming one or more fins extending in a first direction over a substrate. The one or more fins include a first region along the first direction and second regions on both sides of the first region along the first direction. A dopant is shallowly implanted in an upper portion of the first region of the fins but not in the second regions and not in a lower portion of the first region of the fins. A gate structure extending in a second direction perpendicular to the first direction is formed overlying the first region of the fins, and source/drains are formed overlying the second regions of the fins, thereby forming an upper-channel implant transistor.