US Patent Application 18219904. NEURAL PROCESSOR simplified abstract
Contents
NEURAL PROCESSOR
Organization Name
Inventor(s)
Ilia Ovsiannikov of Porter Ranch CA (US)
Ali Shafiee Ardestani of San Jose CA (US)
Joseph H. Hassoun of Los Gatos CA (US)
Lei Wang of Burlingame CA (US)
Sehwan Lee of Hwaseong-si (KR)
JoonHo Song of Hwaseong-si (KR)
Jun-Woo Jang of Hwaseong-si (KR)
Yibing Michelle Wang of Pasadena CA (US)
Yuecheng Li of San Jose CA (US)
NEURAL PROCESSOR - A simplified explanation of the abstract
- This abstract for appeared for US patent application number 18219904 Titled 'NEURAL PROCESSOR'
Simplified Explanation
The abstract describes a neural processor that consists of multiple tiles, a memory, and a bus. The first tile has various components including weight registers, an activations buffer, and multipliers. The activations buffer has two queues connected to the multipliers. The first queue has two registers, with the first register being the output register. The first tile can operate in two states: in the first state, it multiplies a weight with an activation from the output register of the first queue, and in the second state, it multiplies the weight with an activation from the second register of the first queue.
Original Abstract Submitted
A neural processor. In some embodiments, the processor includes a first tile, a second tile, a memory, and a bus. The bus may be connected to the memory, the first tile, and the second tile. The first tile may include: a first weight register, a second weight register, an activations buffer, a first multiplier, and a second multiplier. The activations buffer may be configured to include: a first queue connected to the first multiplier and a second queue connected to the second multiplier. The first queue may include a first register and a second register adjacent to the first register, the first register being an output register of the first queue. The first tile may be configured: in a first state: to multiply, in the first multiplier, a first weight by an activation from the output register of the first queue, and in a second state: to multiply, in the first multiplier, the first weight by an activation from the second register of the first queue.
