US Patent Application 18181293. REDISTRIBUTION LAYER METALLIC STRUCTURE AND METHOD simplified abstract

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REDISTRIBUTION LAYER METALLIC STRUCTURE AND METHOD

Organization Name

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor(s)

Harry-Haklay Chuang of Zhubei City (TW)

Wei Cheng Wu of Hsinchu County (TW)

Chung-Jen Huang of Tainan City (TW)

Wen-Tuo Huang of Tainan City (TW)

Chia-Sheng Lin of Tainan City (TW)

REDISTRIBUTION LAYER METALLIC STRUCTURE AND METHOD - A simplified explanation of the abstract

This abstract first appeared for US patent application 18181293 titled 'REDISTRIBUTION LAYER METALLIC STRUCTURE AND METHOD

Simplified Explanation

The patent application describes a method for connecting integrated circuit (IC) devices on different sides of semiconductor substrates.

  • The method involves forming IC devices on the frontside of two separate semiconductor substrates.
  • Contact pads are then formed on each substrate to allow for electrical connection between the IC devices.
  • The contact pads are bonded together to establish the electrical connection.
  • A conductive structure is formed on the backside of one of the semiconductor substrates.
  • This conductive structure includes a through via (TV) that extends through the substrate and connects the IC devices.
  • A backside metal (BSM) feature is also included in the conductive structure and is connected to the TV.
  • Additionally, a backside redistribution layer (BRDL) is formed and connected to the TV.
  • The TV, BSM feature, and BRDL work together to provide electrical connectivity between the IC devices.


Original Abstract Submitted

A method includes forming first IC devices on a first frontside of a first semiconductor substrate and second IC devices on a second frontside of a second semiconductor substrate; forming a first contact pad over the first IC devices from the first frontside and a second contact pad over the second IC device from the second frontside; bonding the first and second contact pads such that the first and second IC devices are electrically connected; and forming a conductive structure on a first backside of the first semiconductor substrate. The conductive structure includes a through via (TV), a backside metal (BSM) feature, and a backside redistribution layer (BRDL). The TV is extending through the first semiconductor substrate and electrically connected the first and second IC devices to the BRDL, and the BSM feature is extended into a portion of the first semiconductor substrate and electrically connected to the TV.