US Patent Application 18154966. CLOCK GENERATOR AND ELECTRONIC DEVICE INCLUDING THE SAME simplified abstract

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CLOCK GENERATOR AND ELECTRONIC DEVICE INCLUDING THE SAME

Organization Name

SAMSUNG ELECTRONICS CO., LTD.==Inventor(s)==

[[Category:Hyunseok Nam of Suwon-si (KR)]]

[[Category:Jaehyuk Yang of Suwon-si (KR)]]

[[Category:Yongsung Cho of Suwon-si (KR)]]

CLOCK GENERATOR AND ELECTRONIC DEVICE INCLUDING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 18154966 titled 'CLOCK GENERATOR AND ELECTRONIC DEVICE INCLUDING THE SAME

Simplified Explanation

The patent application describes a clock generating device that produces a stable clock signal.

  • The device has a first voltage output circuit that generates a voltage corresponding to the power supply voltage.
  • A clock output circuit generates a preliminary clock signal and a final clock signal based on the difference between the first voltage and a negative feedback voltage.
  • A negative feedback voltage generating circuit generates the negative feedback voltage from a reference value corresponding to the frequency of the final clock signal.
  • The negative feedback voltage is filtered to a uniform voltage level.
  • A second voltage output circuit outputs a second voltage to the negative feedback voltage generating circuit.
  • The second voltage has lower sensitivity to fluctuations in the power supply voltage compared to the first voltage.


Original Abstract Submitted

A clock generating device includes a first voltage output circuit configured to output a first voltage corresponding to a power supply voltage in response to a preliminary clock signal, a clock output circuit configured to generate the preliminary clock signal and a final clock signal at a period corresponding to a difference between the first voltage and a negative feedback voltage, a negative feedback voltage generating circuited configured to generate the negative feedback voltage from a reference value corresponding to a frequency of the final clock signal and a second voltage and filtered to a uniform voltage level, and a second voltage output circuit configured to output the second voltage to the negative feedback voltage generating unit, the second voltage having lower sensitivity of fluctuations in the power supply voltage than the first voltage.

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