US Patent Application 18101653. DELAY CONTROL CIRCUIT AND A MEMORY MODULE INCLUDING THE SAME simplified abstract

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DELAY CONTROL CIRCUIT AND A MEMORY MODULE INCLUDING THE SAME

Organization Name

SAMSUNG ELECTRONICS CO., LTD.==Inventor(s)==

[[Category:Bumsoo Lee of Suwon-si (KR)]]

DELAY CONTROL CIRCUIT AND A MEMORY MODULE INCLUDING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 18101653 titled 'DELAY CONTROL CIRCUIT AND A MEMORY MODULE INCLUDING THE SAME

Simplified Explanation

The patent application describes a delay control circuit that is used to delay a signal by a specific amount of time.

  • The delay control circuit includes a delay cell, which consists of bias inverters, first RC circuits, and second RC circuits.
  • The delay cell activates a certain number of first RC circuits based on a step code, and then delays the signal by a specific amount of time determined by the number of activated first RC circuits.
  • The delayed signal is then outputted.

Additionally, the delay control circuit includes a ZQ calibrator, which consists of pull-up and pull-down circuits.

  • The ZQ calibrator adjusts the number of activated pull-up and pull-down circuits based on a calibration code, and also inputs a pull-up and pull-down voltage to the bias inverters.

Furthermore, the delay control circuit includes a step adjuster, which consists of a first ring oscillator with test delay cells.

  • The step adjuster determines the characteristics of the first and second RC circuits and activates a certain number of second RC circuits based on these characteristics and the operating frequency of the delay control circuit.


Original Abstract Submitted

A delay control circuit includes: a delay cell including a plurality of bias inverters, first RC circuits, and second RC circuits, the delay cell activates a number of first RC circuits in response to a step code, delays a signal by a delay time based on the number of the activated first RC circuits, and outputs the delayed signal; a ZQ calibrator including pull-up and pull-down circuits, the ZQ calibrator adjusts a number of activated pull-up and pull-down circuits, and inputs a pull-up and pull-down voltage, based on a calibration code to the bias inverters; and a step adjuster including a first ring oscillator including test delay cells, the step adjuster determining characteristics of the first and second RC circuits and activates a number of second RC circuits based on the characteristics and an operating frequency of the delay control circuit.