US Patent Application 17828981. INTEGRATED CIRCUIT AND METHOD OF FORMING THE SAME simplified abstract

INTEGRATED CIRCUIT AND METHOD OF FORMING THE SAME

Organization Name

Taiwan Semiconductor Manufacturing Company, Ltd.==Inventor(s)==

[[Category:Chin-Wei Hsu of Hsinchu (TW)]]

[[Category:Shun Li Chen of Hsinchu (TW)]]

[[Category:Ting Yu Chen of Hsinchu (TW)]]

[[Category:Hui-Zhong Zhuang of Hsinchu (TW)]]

[[Category:Chih-Liang Chen of Hsinchu (TW)]]

INTEGRATED CIRCUIT AND METHOD OF FORMING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 17828981 titled 'INTEGRATED CIRCUIT AND METHOD OF FORMING THE SAME

Simplified Explanation

The abstract describes an integrated circuit design that includes active regions, contacts, gates, conductive lines, and vias. Here is a simplified explanation of the patent application:

• The integrated circuit has active regions, which are areas where electronic components are located.
• There is a first contact, which is a connection point for electrical signals.
• The circuit also includes gates, which control the flow of electrical signals.
• There are first and second conductive lines, which are pathways for electrical signals.
• The first contact overlaps with at least one active region.
• The gates overlap with the active regions and are located on a different level.
• The first and second conductive lines overlap with the first contact and are on yet another level.
• A first via is used to connect the first contact and the first conductive line.
• A second via is used to connect the first contact and the second conductive line.

In summary, this patent application describes a specific arrangement of active regions, contacts, gates, conductive lines, and vias in an integrated circuit design.

Original Abstract Submitted

An integrated circuit includes a set of active regions, a first contact, a set of gates, a first and second conductive line and a first and second via. The set of active regions extends in a first direction, and is on a first level. The first contact extends in a second direction, is on a second level, and overlaps at least a first active region. The set of gates extends in the second direction, overlaps the set of active regions, and is on a third level. The first conductive line and the second conductive line extend in the first direction, overlap the first contact, and are on a fourth level. The first via electrically couples the first contact and the first conductive line together. The second via electrically couples the first contact and the second conductive line together.