US Patent Application 17825307. METHODS OF FORMING SEMICONDUCTOR DEVICE STRUCTURES simplified abstract

METHODS OF FORMING SEMICONDUCTOR DEVICE STRUCTURES

Organization Name

Taiwan Semiconductor Manufacturing Company, Ltd.==Inventor(s)==

[[Category:Yu-Chen Ko of Chiayi (TW)]]

[[Category:Kai-Chieh Yang of New Taipei (TW)]]

[[Category:Yu-Ting Wen of Taichung (TW)]]

[[Category:Ya-Yi Cheng of Taichung (TW)]]

[[Category:Min-Hsiu Hung of Tainan (TW)]]

[[Category:Wei-Jung Lin of Hsinchu (TW)]]

[[Category:Chih-Wei Chang of Hsinchu (TW)]]

[[Category:Ming-Hsing Tsai of Chupei (TW)]]

METHODS OF FORMING SEMICONDUCTOR DEVICE STRUCTURES - A simplified explanation of the abstract

This abstract first appeared for US patent application 17825307 titled 'METHODS OF FORMING SEMICONDUCTOR DEVICE STRUCTURES

Simplified Explanation

- The patent application describes methods of forming a semiconductor device structure. - The method involves creating a contact opening in an interlayer dielectric layer and placing a metal layer in the opening. - The metal layer has top, side, and bottom portions, with a space between the top portions. - A gradient metal removal process is performed to increase the size of the space. - A sacrificial layer is then formed in the contact opening and recessed to expose a portion of the sidewall portions. - The top portions and exposed sidewall portions are removed, followed by the removal of the sacrificial layer. - Finally, a bulk metal layer is formed on the bottom portion of the metal layer.

• The patent application focuses on a method for forming a semiconductor device structure.
• The method involves creating a contact opening and placing a metal layer in it.
• A gradient metal removal process is used to increase the space between the metal layer's top portions.
• A sacrificial layer is formed and recessed to expose the sidewall portions of the metal layer.
• The top portions and exposed sidewall portions are then removed.
• The sacrificial layer is removed, and a bulk metal layer is formed on the bottom portion of the metal layer.

Original Abstract Submitted

Methods of forming a semiconductor device structure are described. In some embodiments, the method includes forming a contact opening in an interlayer dielectric (ILD) layer disposed over an epitaxy source/drain region and forming a metal layer in the contact opening. The metal layer includes top portions, side portions, and a bottom portion, and a space is defined between the top portions of the metal layer. The method further includes performing a gradient metal removal process on the metal layer to enlarge the space, forming a sacrificial layer in the contact opening, recessing the sacrificial layer in the contact opening to expose a portion of the sidewall portions, removing the top portions and the exposed portion of the sidewall portions, removing the sacrificial layer, and forming a bulk metal layer on the bottom portion of the metal layer.