US Patent Application 17825269. Transform Architecture in Video Encoding Systems simplified abstract

Transform Architecture in Video Encoding Systems

Organization Name

MEDIATEK INC.

Inventor(s)

Chih-Hsuan Lo of Hsinchu City (TW)

Man-Shu Chiang of Hsinchu City (TW)

Chun-Chia Chen of Hsinchu City (TW)

Chih-Wei Hsu of Hsinchu City (TW)

Tzu-Der Chuang of Hsinchu City (TW)

Ching-Yeh Chen of Hsinchu City (TW)

Yu-Wen Huang of Hsinchu City (TW)

Transform Architecture in Video Encoding Systems - A simplified explanation of the abstract

This abstract first appeared for US patent application 17825269 titled 'Transform Architecture in Video Encoding Systems

Simplified Explanation

- The patent application describes a video encoding system that uses shared transform circuits to process input residual signals and generate transform coefficients. - The system applies horizontal and vertical transforms to the input residual signal to generate transform coefficients. - Quantization and inverse quantization are then applied to the transform coefficients to generate recovered transform coefficients. - The system further applies inverse vertical and horizontal transforms to the recovered transform coefficients to generate a reconstructed residual signal for the current block. - The current block is then encoded based on the quantized levels of the block. - The shared transform circuit and a coefficient buffer in the folded 4-time transform architecture allow for the reuse of computation resources in each transform stage. - The folded 4-time transform architecture also implements a hierarchical design for block size grouping, ensuring a fixed throughput for uniform hardware scheduling.

Original Abstract Submitted

Video encoding methods and apparatuses in a video encoding system receive an input residual signal of a current block by a shared transform circuit, apply horizontal transform and vertical transform by a shared transform circuit to generate transform coefficients, apply quantization and inverse quantization to generate recovered transform coefficients, apply inverse vertical transform and inverse horizontal transform to the recovered transform coefficients by the shared transform circuit to generate a reconstructed residual signal for the current block, and encode the current block based on quantized levels of the current block. The shared transform circuit and a coefficient buffer in the folded 4-time transform architecture reuse computation resources in each transform stage. In some embodiments of the folded 4-time transform architecture, a hierarchical design for block size grouping is implemented with fixed throughput for uniform hardware scheduling.