US Patent Application 17824942. METHOD OF FORMING HIGH VOLTAGE TRANSISTOR AND STRUCTURE RESULTING THEREFROM simplified abstract

METHOD OF FORMING HIGH VOLTAGE TRANSISTOR AND STRUCTURE RESULTING THEREFROM

Organization Name

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor(s)

YUAN-CHENG Yang of TAINAN CITY (TW)

YUN-CHI Wu of TAINAN CITY (TW)

TSU-HSIU Perng of HSINCHU COUNTY (TW)

SHIH-JUNG Tu of TAINAN CITY (TW)

CHENG-BO Shu of TAINAN CITY (TW)

CHIA-CHEN Chang of KAOHSIUNG CITY (TW)

METHOD OF FORMING HIGH VOLTAGE TRANSISTOR AND STRUCTURE RESULTING THEREFROM - A simplified explanation of the abstract

This abstract first appeared for US patent application 17824942 titled 'METHOD OF FORMING HIGH VOLTAGE TRANSISTOR AND STRUCTURE RESULTING THEREFROM

Simplified Explanation

The patent application describes a method for fabricating a transistor on a substrate. Here is a simplified explanation of the abstract:

• The method begins by etching a trench on the substrate's surface.
• The trench is then filled with a dielectric material to create a first isolation region.
• A patterned mask layer is deposited on the substrate, with an opening that exposes the substrate.
• Oxygen is implanted into the substrate through the opening, forming an implant region.
• The implant region is used to generate a second isolation region.
• Finally, a transistor is formed on the substrate, with a channel that surrounds the second isolation region.

Bullet points explaining the patent/innovation:

• The method involves creating isolation regions on a substrate to electrically separate different components.
• The use of a trench and a dielectric material helps in creating the first isolation region.
• Implanting oxygen into the substrate through a patterned mask layer allows for the formation of the second isolation region.
• The second isolation region is used to surround the channel of the transistor, providing electrical isolation.
• This method enables the fabrication of transistors with improved performance and reliability.

Original Abstract Submitted

A method includes: etching a trench on a surface of a substrate; filling the trench with a dielectric material to form a first isolation region; depositing a patterned mask layer on the substrate, the patterned mask layer comprising an opening exposing the substrate; implanting oxygen into the substrate through the opening to form an implant region; generating a second isolation region from the implant region; and forming a transistor on the substrate. The transistor includes a channel laterally surrounding the second isolation region.