US Patent Application 17824936. SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME simplified abstract

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SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME

Organization Name

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor(s)

JHU-MIN Song of NANTOU COUNTY (TW)

CHIEN-CHIH Chou of NEW TAIPEI CITY (TW)

YU-CHANG Jong of HSINCHU CITY (TW)

SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 17824936 titled 'SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME

Simplified Explanation

The patent application describes a semiconductor structure with two FET devices on a substrate.

  • The substrate is divided into two regions, with one FET device in each region.
  • The first FET device has a first isolation structure, a first gate electrode, and a first gate dielectric layer with a certain thickness.
  • The second FET device has multiple fin structures, second isolation structures, a second gate electrode, and a second gate dielectric layer with a smaller thickness than the first.
  • The innovation lies in the difference in gate dielectric layer thickness between the two FET devices.


Original Abstract Submitted

A semiconductor structure includes a substrate, a first FET device and a second FET device. The substrate has a first region and a second region. The first FET device is in the first region, and the second FET device is in the second region. The first FET device includes a first isolation structure, a first gate electrode disposed over a portion of the first isolation structure, and a first gate dielectric layer between the substrate and the first gate electrode. The first gate dielectric layer has a first thickness. The second FET device includes a plurality of fin structures, a plurality of second isolation structures, a second gate electrode over the plurality of fin structures, and a second gate dielectric layer between the second gate electrode and the plurality of fin structures. The second gate dielectric layer has a second thickness. The second thickness is less than the first thickness.