US Patent Application 17821559. INTEGRATED CIRCUIT AND METHOD OF FORMING THE SAME simplified abstract

From WikiPatents
Jump to navigation Jump to search

INTEGRATED CIRCUIT AND METHOD OF FORMING THE SAME

Organization Name

Taiwan Semiconductor Manufacturing Company, Ltd.


Inventor(s)

Johnny Chiahao Li of Hsinchu (TW)

Jung-Chan Yang of Hsinchu (TW)

Jian-Sing Li of Hsinchu (TW)

Hui-Zhong Zhuang of Hsinchu (TW)

Jerry Chang Jui Kao of Hsinchu (TW)

Xiangdong Chen of Hsinchu (TW)

INTEGRATED CIRCUIT AND METHOD OF FORMING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 17821559 titled 'INTEGRATED CIRCUIT AND METHOD OF FORMING THE SAME

Simplified Explanation

The patent application describes a method for forming an integrated circuit (IC) by generating a netlist and a cell layout of a circuit.

  • The netlist designates certain pins of the circuit to be connected together.
  • The cell layout is placed in a specific region of the overall layout design using an automatic placement and routing (APR) tool.
  • The circuit initially designed is non-functional, with two pins that are electrically disconnected.
  • The APR tool connects the designated pins together, transforming the circuit into a functional version.
  • The resulting circuit is a second circuit that is a functional version of the initial non-functional circuit.


Original Abstract Submitted

A method of forming an integrated circuit (IC) includes generating a netlist of a first circuit, generating a first cell layout of the first circuit, placing the first cell layout, by an automatic placement and routing (APR) tool, in a first region of a layout design. The first circuit is configured as a non-functional circuit. The first circuit includes a first pin and a second pin that are electrically disconnected from each other. Generating the netlist of the first circuit includes designating the first pin and the second pin as a first group of pins that are to be connected together. Placing the first cell layout by the APR tool includes connecting the first pin and the second pin in the first group of pins together thereby changing the first circuit to a second circuit. The second circuit is configured as a functional version of the first circuit.