US Patent Application 17819341. Semiconductor Package Including Step Seal Ring and Methods Forming Same simplified abstract

Semiconductor Package Including Step Seal Ring and Methods Forming Same

Organization Name

Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor(s)

Sheng-Han Tsai of Hsinchu (TW)

Yuan Sheng Chiu of Miaoli (TW)

Chou-Jui Hsu of Taoyuan (TW)

Tsung-Shu Lin of New Taipei City (TW)

Semiconductor Package Including Step Seal Ring and Methods Forming Same - A simplified explanation of the abstract

This abstract first appeared for US patent application 17819341 titled 'Semiconductor Package Including Step Seal Ring and Methods Forming Same

Simplified Explanation

The patent application describes a method for forming dielectric layers and metal lines on a semiconductor substrate.

• The method involves forming multiple dielectric layers over the substrate and creating metal lines and vias within these layers.
• The lower portions of both an inner seal ring and an outer seal ring are formed, extending into the dielectric layers.
• A first dielectric layer is then deposited over the metal lines and vias, and an opening is etched through this layer.
• This etching exposes the top surface of the lower portion of the inner seal ring and allows the lower portion of the outer seal ring to be in contact with the bottom surface of the first dielectric layer.
• An upper portion of the inner seal ring is formed to extend into the opening and connect with the lower portion.
• Finally, a second dielectric layer is deposited to cover the upper portion of the inner seal ring.

Overall, the innovation in this patent application lies in the specific method for forming and connecting the inner and outer seal rings within the dielectric layers, providing improved sealing and protection for the semiconductor substrate.

Original Abstract Submitted

A method includes forming a plurality of dielectric layers over a semiconductor substrate, forming a plurality of metal lines and vias in the plurality of dielectric layers, forming a lower portion of an inner seal ring and a lower portion of an outer seal ring extending into the plurality of dielectric layers, depositing a first dielectric layer over the plurality of metal lines and vias, and etching the first dielectric layer to form an opening penetrating through the first dielectric layer. After the first dielectric layer is etched, a top surface of the lower portion of the inner seal ring is exposed, and an entire topmost surface of the lower portion of the outer seal ring is in contact with a bottom surface of the first dielectric layer. An upper portion of the inner seal ring is then formed to extend into the opening and to join the lower portion of the inner seal ring. A second dielectric layer is deposited to cover the upper portion of the inner seal ring.