US Patent Application 17655823. INTERCONNECTIONS FOR MODULAR DIE DESIGNS simplified abstract
Contents
INTERCONNECTIONS FOR MODULAR DIE DESIGNS
Inventors
Siddharth Kamdar of San Diego CA (US)
Christophe Avoinne of San Diego CA (US)
Sanjay Jaisingh Arya of New Delhi (IN)
Manav Shah of San Diego CA (US)
INTERCONNECTIONS FOR MODULAR DIE DESIGNS - A simplified explanation of the abstract
- This abstract for appeared for patent application number 17655823 Titled 'INTERCONNECTIONS FOR MODULAR DIE DESIGNS'
Simplified Explanation
The abstract describes a method for designing and testing modular chiplets, which are small individual chips. Once a chiplet design is approved, multiple chiplets can be combined to create a package with desired computing capabilities. Each chiplet is given a unique identifier, allowing them to know how to connect with other chiplets. This approach reduces testing and expenses while providing more design flexibility.
Original Abstract Submitted
Interconnections for modular die designs are disclosed. In one aspect, a die that is a chiplet is designed and tested for suitability. After approval of the chiplet design, multiple dies or chiplets may be coupled together within a multi-die package to form a package having desired computing capabilities. After assembly, each chiplet is provided a unique identifier, such as by setting a fuse. Based on the unique identifier, each chiplet is made aware of how interfaces to other chiplets are configured so that signals may be routed appropriately. Using modular chiplets in this fashion reduces testing requirements and non-recurring expenses while increasing flexibility for design options.