Qualcomm incorporated (20240379679). THREE-DIMENSIONAL (3D) DUAL COMPLEMENTARY CIRCUIT STRUCTURES AND RELATED FABRICATION METHODS simplified abstract

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THREE-DIMENSIONAL (3D) DUAL COMPLEMENTARY CIRCUIT STRUCTURES AND RELATED FABRICATION METHODS

Organization Name

qualcomm incorporated

Inventor(s)

Xia Li of San Diego CA (US)

Junjing Bao of San Diego CA (US)

Jun Yuan of San Diego CA (US)

THREE-DIMENSIONAL (3D) DUAL COMPLEMENTARY CIRCUIT STRUCTURES AND RELATED FABRICATION METHODS - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240379679 titled 'THREE-DIMENSIONAL (3D) DUAL COMPLEMENTARY CIRCUIT STRUCTURES AND RELATED FABRICATION METHODS

The abstract describes a 3D dual complementary-circuit structure that combines two complementary circuits within a single forksheet structure by bisecting semiconductor slabs in each structure.

  • Two complementary circuits are provided in the space of a single forksheet structure.
  • A dividing wall bisects semiconductor slabs to create portions with different semiconductor types.
  • Complementary metal oxide semiconductor (CMOS) circuits can be formed within a single forksheet structure.
  • The second, third, and fourth semiconductor types may be the same as the first semiconductor type.

Potential Applications: - Integrated circuit design - Semiconductor manufacturing - Electronics industry

Problems Solved: - Efficient use of space in circuit design - Simplified manufacturing process - Enhanced performance of complementary circuits

Benefits: - Higher circuit density - Improved functionality - Cost-effective production

Commercial Applications: Title: "3D Dual Complementary-Circuit Structure for Advanced Integrated Circuits" This technology can be utilized in the development of advanced microprocessors, memory chips, and other semiconductor devices, catering to the growing demand for high-performance electronics in various industries.

Questions about 3D Dual Complementary-Circuit Structure: 1. How does this technology improve circuit efficiency?

  - This technology enhances circuit efficiency by integrating two complementary circuits within a single structure, optimizing space and performance.

2. What are the potential cost savings associated with implementing this innovation?

  - By streamlining the manufacturing process and increasing circuit density, this technology can lead to cost savings in semiconductor production.


Original Abstract Submitted

a 3d dual complementary-circuit structure includes a first forksheet structure stacked on a first side of, in a first direction, a second forksheet structure to provide two complementary circuits in a space of a single forksheet structure. a dividing wall bisects at least one semiconductor slab in the first forksheet structure into a first slab portion with a first semiconductor type and a second slab portion with a second semiconductor type and also bisects at least one semiconductor slab in the second forksheet structure into a third slab portion with a third semiconductor type and a fourth slab portion with a fourth semiconductor type. one of the second semiconductor type, the third semiconductor type, and the fourth semiconductor type may be a same semiconductor type as the first semiconductor type. two complementary metal oxide semiconductor (cmos) circuits may be formed in the area of a single forksheet structure.