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The following pages link to Category:Yu-Chung Lien of San Jose CA (US):

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• US Patent Application 17752590. ADAPTIVE POROGRAMMING DELAY SCHEME IN A MEMORY SUB-SYSTEM simplified abstract ‎ (← links)
• US Patent Application 17830802. DYNAMIC READ LEVEL TRIM SELECTION FOR SCAN OPERATIONS OF MEMORY DEVICES simplified abstract ‎ (← links)
• 17830802. DYNAMIC READ LEVEL TRIM SELECTION FOR SCAN OPERATIONS OF MEMORY DEVICES simplified abstract (Micron Technology, Inc.) ‎ (← links)
• 17874828. RELIABILITY BASED DATA VERIFICATION simplified abstract (Micron Technology, Inc.) ‎ (← links)
• 17888171. ADAPTIVE SENSING TIME FOR MEMORY OPERATIONS simplified abstract (Micron Technology, Inc.) ‎ (← links)
• 17888080. ADAPTIVE BITLINE VOLTAGE FOR MEMORY OPERATIONS simplified abstract (Micron Technology, Inc.) ‎ (← links)
• 17888225. ADAPTIVE SENSING TIME FOR MEMORY OPERATIONS simplified abstract (Micron Technology, Inc.) ‎ (← links)
• 17887348. INDEPENDENT SENSING TIMES simplified abstract (Micron Technology, Inc.) ‎ (← links)
• 17819826. DETECTING A MEMORY WRITE RELIABILITY RISK WITHOUT USING A WRITE VERIFY OPERATION simplified abstract (Micron Technology, Inc.) ‎ (← links)
• 17897183. PROXIMITY BASED PARITY DATA MANAGEMENT simplified abstract (Micron Technology, Inc.) ‎ (← links)
• 17897184. PADDING IN FLASH MEMORY BLOCKS simplified abstract (Micron Technology, Inc.) ‎ (← links)
• 17894528. ADAPTIVE ERROR AVOIDANCE IN THE MEMORY DEVICES simplified abstract (Micron Technology, Inc.) ‎ (← links)
• Micron technology, inc. (20240176508). RELIABILITY GAIN IN MEMORY DEVICES WITH ADAPTIVELY SELECTED ERASE POLICIES simplified abstract ‎ (← links)
• Micron technology, inc. (20240177781). READ OPERATION WITH CAPACITY USAGE DETECTION SCHEME simplified abstract ‎ (← links)
• 18521458. RELIABILITY GAIN IN MEMORY DEVICES WITH ADAPTIVELY SELECTED ERASE POLICIES simplified abstract (Micron Technology, Inc.) ‎ (← links)
• 18388506. READ OPERATION WITH CAPACITY USAGE DETECTION SCHEME simplified abstract (Micron Technology, Inc.) ‎ (← links)
• Micron technology, inc. (20240185924). PASS VOLTAGE ADJUSTMENT FOR PROGRAM OPERATION IN A MEMORY DEVICE WITH A DEFECTIVE DECK simplified abstract ‎ (← links)
• Micron technology, inc. (20240185931). PROGRAM VERIFY COMPENSATION IN A MEMORY DEVICE WITH A DEFECTIVE DECK simplified abstract ‎ (← links)
• Micron technology, inc. (20240185934). PROGRAM VERIFY COMPENSATION BY SENSING TIME MODULATION IN A MEMORY DEVICE WITH A DEFECTIVE DECK simplified abstract ‎ (← links)
• Micron technology, inc. (20240185935). BITLINE VOLTAGE ADJUSTMENT FOR PROGRAM OPERATION IN A MEMORY DEVICE WITH A DEFECTIVE DECK simplified abstract ‎ (← links)
• Micron technology, inc. (20240194279). MANAGING ASYNCHRONOUS POWER LOSS IN A MEMORY DEVICE simplified abstract ‎ (← links)
• 18524721. MANAGING ASYNCHRONOUS POWER LOSS IN A MEMORY DEVICE simplified abstract (Micron Technology, Inc.) ‎ (← links)
• Micron technology, inc. (20240203502). BITLINE VOLTAGE ADJUSTMENT FOR PROGRAM OPERATION IN A MEMORY DEVICE simplified abstract ‎ (← links)
• Micron technology, inc. (20240203503). PROGRAM VERIFY LEVEL ADJUSTMENT FOR PROGRAM OPERATION IN A MEMORY DEVICE simplified abstract ‎ (← links)
• Micron technology, inc. (20240203504). SENSING TIME ADJUSTMENT FOR PROGRAM OPERATION IN A MEMORY DEVICE simplified abstract ‎ (← links)
• Micron technology, inc. (20240203507). MANAGING ALLOCATION OF BLOCKS IN A MEMORY SUB-SYSTEM simplified abstract ‎ (← links)
• Micron technology, inc. (20240203513). PASS VOLTAGE ADJUSTMENT FOR PROGRAM OPERATION IN A MEMORY DEVICE simplified abstract ‎ (← links)
• Micron technology, inc. (20240231641). MANAGING ALLOCATION OF SUB-BLOCKS IN A MEMORY SUB-SYSTEM simplified abstract ‎ (← links)
• 18402306. MANAGING ALLOCATION OF SUB-BLOCKS IN A MEMORY SUB-SYSTEM simplified abstract (Micron Technology, Inc.) ‎ (← links)
• Micron technology, inc. (20240248619). DYNAMIC READ RETRY VOLTAGE SEQUENCES IN A MEMORY SUBSYSTEM simplified abstract ‎ (← links)
• Micron technology, inc. (20240249772). ELONGATED CAPACITORS IN 3D NAND MEMORY DEVICES simplified abstract ‎ (← links)
• 18406687. DYNAMIC READ RETRY VOLTAGE SEQUENCES IN A MEMORY SUBSYSTEM simplified abstract (Micron Technology, Inc.) ‎ (← links)
• 18405049. ELONGATED CAPACITORS IN 3D NAND MEMORY DEVICES simplified abstract (Micron Technology, Inc.) ‎ (← links)
• Micron Technology, Inc. Patent Application Trends in 2024 ‎ (← links)
• Category:Zhenming Zhou of San Jose CA (US) ‎ (← links)
• Category:Murong Lang of San Jose CA (US) ‎ (← links)
• Micron technology, inc. (20240256155). MEMORY READ OPERATION USING A VOLTAGE PATTERN BASED ON A READ COMMAND TYPE simplified abstract ‎ (← links)
• Micron technology, inc. (20240281145). DYNAMIC ERASE OPERATION SELECTION USING ERASE POLICY simplified abstract ‎ (← links)
• 18439318. DYNAMIC ERASE OPERATION SELECTION USING ERASE POLICY simplified abstract (Micron Technology, Inc.) ‎ (← links)
• Micron technology, inc. (20240302967). ADAPTIVE SENSING TIME FOR MEMORY OPERATIONS simplified abstract ‎ (← links)
• Micron technology, inc. (20240304256). PROGRAMMING DELAY SCHEME FOR IN A MEMORY SUB-SYSTEM BASED ON MEMORY RELIABILITY simplified abstract ‎ (← links)
• 18663978. ADAPTIVE SENSING TIME FOR MEMORY OPERATIONS simplified abstract (Micron Technology, Inc.) ‎ (← links)
• 18666063. PROGRAMMING DELAY SCHEME FOR IN A MEMORY SUB-SYSTEM BASED ON MEMORY RELIABILITY simplified abstract (Micron Technology, Inc.) ‎ (← links)

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