Huawei technologies co., ltd. (20250008746). VERTICAL CHANNEL TRANSISTOR STRUCTURE AND MANUFACTURING METHOD THEREOF: Difference between revisions
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==Inventor(s)== | ==Inventor(s)== | ||
[[:Category:Kailiang Huang of Shenzhen | [[:Category:Kailiang Huang of Shenzhen CN|Kailiang Huang of Shenzhen CN]][[Category:Kailiang Huang of Shenzhen CN]] | ||
[[:Category:Weiliang Jing of Shanghai | [[:Category:Weiliang Jing of Shanghai CN|Weiliang Jing of Shanghai CN]][[Category:Weiliang Jing of Shanghai CN]] | ||
[[:Category:Zhaogui Wang of Shanghai | [[:Category:Zhaogui Wang of Shanghai CN|Zhaogui Wang of Shanghai CN]][[Category:Zhaogui Wang of Shanghai CN]] | ||
[[:Category:Junxiao Feng of Shenzhen | [[:Category:Junxiao Feng of Shenzhen CN|Junxiao Feng of Shenzhen CN]][[Category:Junxiao Feng of Shenzhen CN]] | ||
[[:Category:Zhengbo Wang of Beijing | [[:Category:Zhengbo Wang of Beijing CN|Zhengbo Wang of Beijing CN]][[Category:Zhengbo Wang of Beijing CN]] | ||
==VERTICAL CHANNEL TRANSISTOR STRUCTURE AND MANUFACTURING METHOD THEREOF== | ==VERTICAL CHANNEL TRANSISTOR STRUCTURE AND MANUFACTURING METHOD THEREOF== | ||
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This abstract first appeared for US patent application 20250008746 titled 'VERTICAL CHANNEL TRANSISTOR STRUCTURE AND MANUFACTURING METHOD THEREOF | This abstract first appeared for US patent application 20250008746 titled 'VERTICAL CHANNEL TRANSISTOR STRUCTURE AND MANUFACTURING METHOD THEREOF | ||
==Original Abstract Submitted== | ==Original Abstract Submitted== | ||
Latest revision as of 03:40, 25 March 2025
VERTICAL CHANNEL TRANSISTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
Organization Name
Inventor(s)
VERTICAL CHANNEL TRANSISTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
This abstract first appeared for US patent application 20250008746 titled 'VERTICAL CHANNEL TRANSISTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
Original Abstract Submitted
embodiments of this disclosure relate to a vertical channel transistor structure. an example vertical channel transistor structure includes a stacked structure. the stacked structure includes a first metal layer, a first contact layer, an insulation dielectric layer, a second contact layer, a second metal layer, and a groove. the first contact layer is located between the first metal layer and the insulation dielectric layer, and the second contact layer is located between the second metal layer and the insulation dielectric layer. the groove penetrates the second metal layer, the second contact layer, the insulation dielectric layer, and the second contact layer. the groove is at least partially recessed into the first metal layer. the groove includes a semiconductor channel layer, a gate oxygen dielectric layer, and a gate.