Samsung electronics co., ltd. (20250081585). GATE STRUCTURES AND SEMICONDUCTOR DEVICES INCLUDING THE SAME: Difference between revisions
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[[Category:samsung electronics co., ltd.]] | [[Category:samsung electronics co., ltd.]] | ||
==Inventor(s)== | |||
[[:Category:Jaejin Lee of Goyang-si (KR)|Jaejin Lee of Goyang-si (KR)]][[Category:Jaejin Lee of Goyang-si (KR)]] | |||
[[:Category:Youngjun Kim of Seoul (KR)|Youngjun Kim of Seoul (KR)]][[Category:Youngjun Kim of Seoul (KR)]] | |||
[[:Category:Hunyoung Bark of Suwon-si (KR)|Hunyoung Bark of Suwon-si (KR)]][[Category:Hunyoung Bark of Suwon-si (KR)]] | |||
[[:Category:Taekyung Yoon of Hwaseong-si (KR)|Taekyung Yoon of Hwaseong-si (KR)]][[Category:Taekyung Yoon of Hwaseong-si (KR)]] | |||
[[:Category:Eunok Lee of Suwon-si (KR)|Eunok Lee of Suwon-si (KR)]][[Category:Eunok Lee of Suwon-si (KR)]] | |||
==GATE STRUCTURES AND SEMICONDUCTOR DEVICES INCLUDING THE SAME== | |||
This abstract first appeared for US patent application 20250081585 titled 'GATE STRUCTURES AND SEMICONDUCTOR DEVICES INCLUDING THE SAME | |||
==Original Abstract Submitted== | |||
a gate structure includes a first gate electrode including a metal, a gate barrier pattern on the first gate electrode and including a metal nitride, and a second gate electrode on the gate barrier pattern. the gate structure is buried in an upper portion of a substrate. the gate barrier pattern has a flat upper surface and an uneven lower surface. | |||
[[Category:H01L29/49]] | |||
[[Category:H10B12/00]] | |||
[[Category:CPC_H10D64/667]] | |||
Latest revision as of 02:16, 17 March 2025
GATE STRUCTURES AND SEMICONDUCTOR DEVICES INCLUDING THE SAME
Organization Name
Inventor(s)
Hunyoung Bark of Suwon-si (KR)
Taekyung Yoon of Hwaseong-si (KR)
GATE STRUCTURES AND SEMICONDUCTOR DEVICES INCLUDING THE SAME
This abstract first appeared for US patent application 20250081585 titled 'GATE STRUCTURES AND SEMICONDUCTOR DEVICES INCLUDING THE SAME
Original Abstract Submitted
a gate structure includes a first gate electrode including a metal, a gate barrier pattern on the first gate electrode and including a metal nitride, and a second gate electrode on the gate barrier pattern. the gate structure is buried in an upper portion of a substrate. the gate barrier pattern has a flat upper surface and an uneven lower surface.