Samsung electronics co., ltd. (20250089320). SEMICONDUCTOR DEVICE: Difference between revisions
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[[Category:samsung electronics co., ltd.]] | [[Category:samsung electronics co., ltd.]] | ||
==Inventor(s)== | |||
[[:Category:Yeonchoo Cho of Seongnam-si (KR)|Yeonchoo Cho of Seongnam-si (KR)]][[Category:Yeonchoo Cho of Seongnam-si (KR)]] | |||
[[:Category:Kyung-Eun Byun of Seongnam-si (KR)|Kyung-Eun Byun of Seongnam-si (KR)]][[Category:Kyung-Eun Byun of Seongnam-si (KR)]] | |||
[[:Category:Keunwook Shin of Yongin-si (KR)|Keunwook Shin of Yongin-si (KR)]][[Category:Keunwook Shin of Yongin-si (KR)]] | |||
[[:Category:Hyeonjin Shin of Suwon-si (KR)|Hyeonjin Shin of Suwon-si (KR)]][[Category:Hyeonjin Shin of Suwon-si (KR)]] | |||
==SEMICONDUCTOR DEVICE== | |||
This abstract first appeared for US patent application 20250089320 titled 'SEMICONDUCTOR DEVICE | |||
==Original Abstract Submitted== | |||
a semiconductor device is provided. the semiconductor device includes a metal layer, a semiconductor layer in electrical contact with the metal layer, a two-dimensional (2d) material layer disposed between the metal layer and the semiconductor layer and having a 2d crystal structure, and a metal compound layer disposed between the 2d material layer and the semiconductor layer. | |||
[[Category:H01L29/04]] | |||
[[Category:H01L23/522]] | |||
[[Category:H01L29/16]] | |||
[[Category:H01L29/161]] | |||
[[Category:H01L29/49]] | |||
[[Category:H01L29/78]] | |||
[[Category:CPC_H10D62/40]] | |||
Latest revision as of 02:14, 15 March 2025
SEMICONDUCTOR DEVICE
Organization Name
Inventor(s)
Yeonchoo Cho of Seongnam-si (KR)
Kyung-Eun Byun of Seongnam-si (KR)
Keunwook Shin of Yongin-si (KR)
Hyeonjin Shin of Suwon-si (KR)
SEMICONDUCTOR DEVICE
This abstract first appeared for US patent application 20250089320 titled 'SEMICONDUCTOR DEVICE
Original Abstract Submitted
a semiconductor device is provided. the semiconductor device includes a metal layer, a semiconductor layer in electrical contact with the metal layer, a two-dimensional (2d) material layer disposed between the metal layer and the semiconductor layer and having a 2d crystal structure, and a metal compound layer disposed between the 2d material layer and the semiconductor layer.