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Samsung electronics co., ltd. (20250087646). SEMICONDUCTOR PACKAGE INCLUDING BACKSIDE POWER DELIVERY NETWORK LAYER: Difference between revisions

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[[Category:samsung electronics co., ltd.]]
[[Category:samsung electronics co., ltd.]]
==Inventor(s)==
[[:Category:Hyunsoo Chung of Suwon-si (KR)|Hyunsoo Chung of Suwon-si (KR)]][[Category:Hyunsoo Chung of Suwon-si (KR)]]
[[:Category:Kwang-Soo Kim of Suwon-si (KR)|Kwang-Soo Kim of Suwon-si (KR)]][[Category:Kwang-Soo Kim of Suwon-si (KR)]]
[[:Category:Jaesic Lee of Suwon-si (KR)|Jaesic Lee of Suwon-si (KR)]][[Category:Jaesic Lee of Suwon-si (KR)]]
==SEMICONDUCTOR PACKAGE INCLUDING BACKSIDE POWER DELIVERY NETWORK LAYER==
This abstract first appeared for US patent application 20250087646 titled 'SEMICONDUCTOR PACKAGE INCLUDING BACKSIDE POWER DELIVERY NETWORK LAYER
==Original Abstract Submitted==
a semiconductor package includes a first redistribution substrate, a first semiconductor chip on the first redistribution substrate, a first mold layer at least partially covering the first redistribution substrate and the first semiconductor chip, a plurality of first conductive pillars at least partially penetrating the first mold layer and contacting the first redistribution substrate, a second redistribution substrate on the first mold layer, a second semiconductor chip on the second redistribution substrate, a second mold layer at least partially covering the second redistribution substrate and the second semiconductor chip, a plurality of second conductive pillars at least partially penetrating the second mold layer and contacting the second redistribution substrate, and a third redistribution substrate on the second mold layer. the first semiconductor chip includes a first through via. the second semiconductor chip includes a backside power delivery network layer.
[[Category:H01L25/10]]
[[Category:H01L23/00]]
[[Category:H01L23/31]]
[[Category:H01L23/48]]
[[Category:H01L23/498]]
[[Category:H01L23/528]]
[[Category:H01L23/538]]
[[Category:CPC_H01L25/105]]

Latest revision as of 02:11, 15 March 2025

SEMICONDUCTOR PACKAGE INCLUDING BACKSIDE POWER DELIVERY NETWORK LAYER

Organization Name

samsung electronics co., ltd.

Inventor(s)

Hyunsoo Chung of Suwon-si (KR)

Kwang-Soo Kim of Suwon-si (KR)

Jaesic Lee of Suwon-si (KR)

SEMICONDUCTOR PACKAGE INCLUDING BACKSIDE POWER DELIVERY NETWORK LAYER

This abstract first appeared for US patent application 20250087646 titled 'SEMICONDUCTOR PACKAGE INCLUDING BACKSIDE POWER DELIVERY NETWORK LAYER

Original Abstract Submitted

a semiconductor package includes a first redistribution substrate, a first semiconductor chip on the first redistribution substrate, a first mold layer at least partially covering the first redistribution substrate and the first semiconductor chip, a plurality of first conductive pillars at least partially penetrating the first mold layer and contacting the first redistribution substrate, a second redistribution substrate on the first mold layer, a second semiconductor chip on the second redistribution substrate, a second mold layer at least partially covering the second redistribution substrate and the second semiconductor chip, a plurality of second conductive pillars at least partially penetrating the second mold layer and contacting the second redistribution substrate, and a third redistribution substrate on the second mold layer. the first semiconductor chip includes a first through via. the second semiconductor chip includes a backside power delivery network layer.

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