Difference between revisions of "Category:Ming-Fa Chen"

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(Updating Category:Ming-Fa_Chen)
 
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=== Executive Summary ===
 
=== Executive Summary ===
Ming-Fa Chen is an inventor who has filed 15 patents. Their primary areas of innovation include SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (8 patents), Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements {; Selection of materials therefor} (5 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (5 patents), and they have worked with companies such as Taiwan Semiconductor Manufacturing Company, Ltd. (15 patents). Their most frequent collaborators include [[Category:Hsien-Wei Chen|Hsien-Wei Chen]] (9 collaborations), [[Category:Jie Chen|Jie Chen]] (5 collaborations), [[Category:Sung-Feng Yeh|Sung-Feng Yeh]] (3 collaborations).
+
Ming-Fa Chen is an inventor who has filed 14 patents. Their primary areas of innovation include {Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected} (8 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (7 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (7 patents), and they have worked with companies such as Taiwan Semiconductor Manufacturing Co., Ltd. (13 patents), Taiwan Semiconductor Manufacturing CO., Ltd. (1 patents). Their most frequent collaborators include [[Category:Hsien-Wei Chen|Hsien-Wei Chen]] (6 collaborations), [[Category:Chen-Hua Yu|Chen-Hua Yu]] (3 collaborations), [[Category:Chih-Chia Hu|Chih-Chia Hu]] (3 collaborations).
  
 
=== Patent Filing Activity ===
 
=== Patent Filing Activity ===
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==== List of Technology Areas ====
 
==== List of Technology Areas ====
* [[:Category:CPC_H01L24/08|H01L24/08]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 8 patents
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* [[:Category:CPC_H01L24/80|H01L24/80]] ({Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected}): 8 patents
* [[:Category:CPC_H01L23/481|H01L23/481]] (Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements {; Selection of materials therefor}): 5 patents
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* [[:Category:CPC_H01L24/08|H01L24/08]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 7 patents
* [[:Category:CPC_H01L24/05|H01L24/05]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 5 patents
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* [[:Category:CPC_H01L2224/80895|H01L2224/80895]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 7 patents
* [[:Category:CPC_H01L25/0657|H01L25/0657]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 5 patents
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* [[:Category:CPC_H01L2224/80896|H01L2224/80896]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 7 patents
* [[:Category:CPC_H01L23/3157|H01L23/3157]] ({Partial encapsulation or coating  (mask layer used as insulation layer): 4 patents
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* [[:Category:CPC_H01L25/50|H01L25/50]] ({Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group): 7 patents
* [[:Category:CPC_H01L24/06|H01L24/06]] ({of a plurality of bonding areas}): 3 patents
+
* [[:Category:CPC_H01L2224/08145|H01L2224/08145]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
* [[:Category:CPC_H01L25/50|H01L25/50]] ({Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group): 3 patents
+
* [[:Category:CPC_H01L25/0657|H01L25/0657]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
* [[:Category:CPC_H01L24/32|H01L24/32]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
+
* [[:Category:CPC_H01L2225/06541|H01L2225/06541]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
* [[:Category:CPC_H01L24/80|H01L24/80]] ({Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected}): 3 patents
+
* [[:Category:CPC_H01L23/5386|H01L23/5386]] (the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates  ({): 3 patents
* [[:Category:CPC_H01L24/73|H01L24/73]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
+
* [[:Category:CPC_H01L21/4853|H01L21/4853]] (Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups): 3 patents
* [[:Category:CPC_H01L2224/08146|H01L2224/08146]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
 
* [[:Category:CPC_H01L23/3128|H01L23/3128]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
 
 
* [[:Category:CPC_H01L23/49816|H01L23/49816]] (Leads, {i.e. metallisations or lead-frames} on insulating substrates, {e.g. chip carriers  (shape of the substrate): 3 patents
 
* [[:Category:CPC_H01L23/49816|H01L23/49816]] (Leads, {i.e. metallisations or lead-frames} on insulating substrates, {e.g. chip carriers  (shape of the substrate): 3 patents
 
* [[:Category:CPC_H01L25/0655|H01L25/0655]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
 
* [[:Category:CPC_H01L25/0655|H01L25/0655]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
* [[:Category:CPC_H01L23/5226|H01L23/5226]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
+
* [[:Category:CPC_H01L2224/08225|H01L2224/08225]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
* [[:Category:CPC_H01L24/13|H01L24/13]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
+
* [[:Category:CPC_H01L23/5389|H01L23/5389]] (the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates  ({): 3 patents
* [[:Category:CPC_H01L2224/0401|H01L2224/0401]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
+
* [[:Category:CPC_H01L23/49827|H01L23/49827]] ({Via connections through the substrates, e.g. pins going through the substrate, coaxial cables  (): 3 patents
* [[:Category:CPC_H01L2224/0557|H01L2224/0557]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
+
* [[:Category:CPC_H01L25/0652|H01L25/0652]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
 +
* [[:Category:CPC_H01L25/18|H01L25/18]] (the devices being of types provided for in two or more different subgroups of the same main group of groups): 3 patents
 +
* [[:Category:CPC_H01L21/565|H01L21/565]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
 +
* [[:Category:CPC_H01L23/3128|H01L23/3128]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
 +
* [[:Category:CPC_H01L23/5385|H01L23/5385]] (the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates  ({): 2 patents
 +
* [[:Category:CPC_H01L2224/94|H01L2224/94]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
 +
* [[:Category:CPC_H01L2924/182|H01L2924/182]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
 +
* [[:Category:CPC_H01L23/5226|H01L23/5226]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
 +
* [[:Category:CPC_H01L24/09|H01L24/09]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
 +
* [[:Category:CPC_H01L2224/08146|H01L2224/08146]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
 +
* [[:Category:CPC_H01L21/6835|H01L21/6835]] ({using temporarily an auxiliary support}): 2 patents
 
* [[:Category:CPC_H01L24/16|H01L24/16]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
 
* [[:Category:CPC_H01L24/16|H01L24/16]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
* [[:Category:CPC_H01L2224/08145|H01L2224/08145]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
+
* [[:Category:CPC_H01L2225/06524|H01L2225/06524]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
* [[:Category:CPC_H01L2224/80895|H01L2224/80895]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
+
* [[:Category:CPC_H01L2225/06589|H01L2225/06589]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
* [[:Category:CPC_H01L2224/80896|H01L2224/80896]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
+
* [[:Category:CPC_H01L2225/06586|H01L2225/06586]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
* [[:Category:CPC_H01L2224/73204|H01L2224/73204]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
+
* [[:Category:CPC_H01L23/481|H01L23/481]] (Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements {; Selection of materials therefor}): 2 patents
* [[:Category:CPC_H01L2224/06515|H01L2224/06515]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
+
* [[:Category:CPC_H01L25/105|H01L25/105]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
* [[:Category:CPC_H01L23/49822|H01L23/49822]] ({Multilayer substrates  (multilayer metallisation on monolayer substrate): 2 patents
+
* [[:Category:CPC_H01L2225/1035|H01L2225/1035]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
* [[:Category:CPC_G02B6/12002|G02B6/12002]] (of the integrated circuit kind  (electric integrated circuits): 2 patents
+
* [[:Category:CPC_H01L2225/1058|H01L2225/1058]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
* [[:Category:CPC_H01L2224/80001|H01L2224/80001]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
+
* [[:Category:CPC_H01L21/4857|H01L21/4857]] (Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups): 2 patents
* [[:Category:CPC_H01L21/486|H01L21/486]] (Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups): 2 patents
+
* [[:Category:CPC_H01L23/5383|H01L23/5383]] ({Multilayer substrates  (): 2 patents
* [[:Category:CPC_H01L23/5283|H01L23/5283]] ({Geometry or} layout of the interconnection structure {(): 2 patents
+
* [[:Category:CPC_H01L21/82|H01L21/82]] (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
* [[:Category:CPC_H01L23/5386|H01L23/5386]] (the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates  ({): 2 patents
+
* [[:Category:CPC_H01L23/5381|H01L23/5381]] (the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates  ({): 1 patents
* [[:Category:CPC_H01L25/0652|H01L25/0652]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
+
* [[:Category:CPC_H01L24/94|H01L24/94]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_H01L23/3185|H01L23/3185]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
+
* [[:Category:CPC_H01L2224/80203|H01L2224/80203]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_H01L23/538|H01L23/538]] (the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates  ({): 1 patents
+
* [[:Category:CPC_H01L23/5286|H01L23/5286]] ({Geometry or} layout of the interconnection structure {(): 1 patents
* [[:Category:CPC_H01L23/5384|H01L23/5384]] ({Conductive vias through the substrate with or without pins, e.g. buried coaxial conductors  (): 1 patents
+
* [[:Category:CPC_H01L2224/08135|H01L2224/08135]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_H01L25/18|H01L25/18]] (the devices being of types provided for in two or more different subgroups of the same main group of groups): 1 patents
+
* [[:Category:CPC_H01L2224/08137|H01L2224/08137]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_H10B80/00|H10B80/00]] (Assemblies of multiple devices comprising at least one memory device covered by this subclass): 1 patents
 
* [[:Category:CPC_H01L2224/05571|H01L2224/05571]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L2224/05624|H01L2224/05624]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L2224/05647|H01L2224/05647]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L2224/05666|H01L2224/05666]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L2224/05684|H01L2224/05684]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L2224/06181|H01L2224/06181]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
 
* [[:Category:CPC_H01L2224/08147|H01L2224/08147]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L2224/08147|H01L2224/08147]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_H01L2224/08221|H01L2224/08221]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
+
* [[:Category:CPC_H01L21/563|H01L21/563]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_H01L2224/13111|H01L2224/13111]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
+
* [[:Category:CPC_H01L23/147|H01L23/147]] ({Semiconductor insulating substrates  (semiconductor conductive substrates): 1 patents
* [[:Category:CPC_H01L2224/13124|H01L2224/13124]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
+
* [[:Category:CPC_H01L23/3121|H01L23/3121]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_H01L2224/13139|H01L2224/13139]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
+
* [[:Category:CPC_H01L23/49822|H01L23/49822]] ({Multilayer substrates  (multilayer metallisation on monolayer substrate): 1 patents
* [[:Category:CPC_H01L2224/13144|H01L2224/13144]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
+
* [[:Category:CPC_H01L24/81|H01L24/81]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_H01L2224/13147|H01L2224/13147]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
+
* [[:Category:CPC_H01L24/97|H01L24/97]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_H01L2224/13164|H01L2224/13164]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
+
* [[:Category:CPC_H01L23/3677|H01L23/3677]] (Cooling facilitated by shape of device {(): 1 patents
* [[:Category:CPC_H01L25/167|H01L25/167]] (the devices being of types provided for in two or more different main groups of groups): 1 patents
+
* [[:Category:CPC_H01L24/32|H01L24/32]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_H01L24/92|H01L24/92]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
+
* [[:Category:CPC_H01L24/73|H01L24/73]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 +
* [[:Category:CPC_H01L21/4882|H01L21/4882]] (Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups): 1 patents
 +
* [[:Category:CPC_H01L2225/06517|H01L2225/06517]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 +
* [[:Category:CPC_H01L2924/16251|H01L2924/16251]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 +
* [[:Category:CPC_H01L2924/1632|H01L2924/1632]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 +
* [[:Category:CPC_H01L2224/16227|H01L2224/16227]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 +
* [[:Category:CPC_H01L2224/16237|H01L2224/16237]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L2224/32225|H01L2224/32225]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L2224/32225|H01L2224/32225]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_H01L2224/26145|H01L2224/26145]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
+
* [[:Category:CPC_H01L2224/73204|H01L2224/73204]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_H01L2224/16225|H01L2224/16225]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
+
* [[:Category:CPC_H01L2224/08245|H01L2224/08245]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_H01L2224/92125|H01L2224/92125]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
+
* [[:Category:CPC_H01L2224/8083|H01L2224/8083]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_G02B6/4228|G02B6/4228]] (Coupling light guides with opto-electronic elements): 1 patents
+
* [[:Category:CPC_H01L21/76224|H01L21/76224]] ({using trench refilling with dielectric materials  (trench filling with polycristalline silicon): 1 patents
* [[:Category:CPC_H01L2224/0603|H01L2224/0603]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
+
* [[:Category:CPC_H01L21/7684|H01L21/7684]] (Applying interconnections to be used for carrying current between separate components within a device {comprising conductors and dielectrics}): 1 patents
* [[:Category:CPC_G02B6/122|G02B6/122]] (of the integrated circuit kind  (electric integrated circuits): 1 patents
+
* [[:Category:CPC_H01L21/76846|H01L21/76846]] ({Layer combinations}): 1 patents
* [[:Category:CPC_G02B2006/12147|G02B2006/12147]] (OPTICAL ELEMENTS, SYSTEMS OR APPARATUS): 1 patents
+
* [[:Category:CPC_H01L23/585|H01L23/585]] ({comprising conductive layers or plates or strips or rods or rings  (): 1 patents
* [[:Category:CPC_H01L2224/08165|H01L2224/08165]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
+
* [[:Category:CPC_H01L23/53295|H01L23/53295]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_H01L2224/32146|H01L2224/32146]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
+
* [[:Category:CPC_H01L29/0649|H01L29/0649]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_H01L2924/182|H01L2924/182]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
+
* [[:Category:CPC_H01L24/83|H01L24/83]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_H01L2924/01029|H01L2924/01029]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
+
* [[:Category:CPC_H01L24/03|H01L24/03]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 +
* [[:Category:CPC_H01L24/33|H01L24/33]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 +
* [[:Category:CPC_H01L23/562|H01L23/562]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 +
* [[:Category:CPC_H01L2225/06568|H01L2225/06568]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 +
* [[:Category:CPC_H01L2225/06565|H01L2225/06565]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 +
* [[:Category:CPC_H01L2225/06593|H01L2225/06593]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 +
* [[:Category:CPC_H01L2225/06513|H01L2225/06513]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 +
* [[:Category:CPC_H01L2924/1434|H01L2924/1434]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 +
* [[:Category:CPC_H01L2924/1431|H01L2924/1431]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 +
* [[:Category:CPC_H01L21/76898|H01L21/76898]] ({formed through a semiconductor substrate}): 1 patents
 +
* [[:Category:CPC_H01L21/568|H01L21/568]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 +
* [[:Category:CPC_H01L2221/68372|H01L2221/68372]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 +
* [[:Category:CPC_H01L2225/06548|H01L2225/06548]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 +
* [[:Category:CPC_H01L2224/80006|H01L2224/80006]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 +
* [[:Category:CPC_H01L2225/06582|H01L2225/06582]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 +
* [[:Category:CPC_H01L21/481|H01L21/481]] (Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups): 1 patents
 
* [[:Category:CPC_H01L21/56|H01L21/56]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L21/56|H01L21/56]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_H01L23/528|H01L23/528]] ({Geometry or} layout of the interconnection structure {(): 1 patents
+
* [[:Category:CPC_H01L2225/1041|H01L2225/1041]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 +
* [[:Category:CPC_H01L21/4871|H01L21/4871]] (Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups): 1 patents
 +
* [[:Category:CPC_H01L21/78|H01L21/78]] (with subsequent division of the substrate into plural individual devices  (cutting to change the surface-physical characteristics or shape of semiconductor bodies): 1 patents
 +
* [[:Category:CPC_H01L22/12|H01L22/12]] ({for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions  (electrical measurement of diffusions): 1 patents
 +
* [[:Category:CPC_H01L23/3675|H01L23/3675]] (Cooling facilitated by shape of device {(): 1 patents
 
* [[:Category:CPC_H01L24/19|H01L24/19]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L24/19|H01L24/19]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_H01L24/24|H01L24/24]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
+
* [[:Category:CPC_H01L24/20|H01L24/20]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_H01L24/89|H01L24/89]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
+
* [[:Category:CPC_H01L2224/214|H01L2224/214]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_H01L28/60|H01L28/60]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
+
* [[:Category:CPC_H01L2924/19103|H01L2924/19103]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
* [[:Category:CPC_H01L2224/24145|H01L2224/24145]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
+
* [[:Category:CPC_H01L24/06|H01L24/06]] ({of a plurality of bonding areas}): 1 patents
* [[:Category:CPC_H01L2225/06548|H01L2225/06548]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
+
* [[:Category:CPC_H01L23/49503|H01L23/49503]] (Lead-frames {or other flat leads (): 1 patents
* [[:Category:CPC_H01L2225/06568|H01L2225/06568]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
+
* [[:Category:CPC_H03K19/1776|H03K19/1776]] (PULSE TECHNIQUE (measuring pulse characteristics): 1 patents
* [[:Category:CPC_H01L2225/06586|H01L2225/06586]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
+
* [[:Category:CPC_H01L23/49844|H01L23/49844]] (Leads, {i.e. metallisations or lead-frames} on insulating substrates, {e.g. chip carriers (shape of the substrate): 1 patents
* [[:Category:CPC_H01L2924/19041|H01L2924/19041]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
+
* [[:Category:CPC_H01L23/42|H01L23/42]] (Fillings or auxiliary members in containers {or encapsulations} selected or arranged to facilitate heating or cooling): 1 patents
* [[:Category:CPC_G02B6/4202|G02B6/4202]] (Coupling light guides with opto-electronic elements): 1 patents
 
* [[:Category:CPC_H01L21/4853|H01L21/4853]] (Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups): 1 patents
 
* [[:Category:CPC_H01L23/49827|H01L23/49827]] ({Via connections through the substrates, e.g. pins going through the substrate, coaxial cables (): 1 patents
 
* [[:Category:CPC_H01L21/3043|H01L21/3043]] ({Making grooves, e.g. cutting}): 1 patents
 
* [[:Category:CPC_H01L24/94|H01L24/94]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L21/78|H01L21/78]] (with subsequent division of the substrate into plural individual devices (cutting to change the surface-physical characteristics or shape of semiconductor bodies): 1 patents
 
* [[:Category:CPC_H01L27/1104|H01L27/1104]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_G11C5/06|G11C5/06]] (STATIC STORES  (semiconductor memory devices): 1 patents
 
* [[:Category:CPC_H01L23/367|H01L23/367]] (Cooling facilitated by shape of device {(): 1 patents
 
* [[:Category:CPC_H01L23/473|H01L23/473]] (by flowing liquids {(): 1 patents
 
* [[:Category:CPC_H01L23/3732|H01L23/3732]] ({Diamonds}): 1 patents
 
* [[:Category:CPC_H01L23/3736|H01L23/3736]] ({Metallic materials  (): 1 patents
 
* [[:Category:CPC_H01L23/3738|H01L23/3738]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L23/373|H01L23/373]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L2224/32245|H01L2224/32245]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L2224/29124|H01L2224/29124]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L2224/29147|H01L2224/29147]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L2224/29105|H01L2224/29105]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L2224/29117|H01L2224/29117]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L2224/29144|H01L2224/29144]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L2224/2916|H01L2224/2916]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L2224/29123|H01L2224/29123]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L2224/29155|H01L2224/29155]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L2224/29169|H01L2224/29169]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L2224/29139|H01L2224/29139]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L2224/29166|H01L2224/29166]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L2224/29184|H01L2224/29184]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L2224/29118|H01L2224/29118]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L2224/29138|H01L2224/29138]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L2224/29193|H01L2224/29193]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L2224/29186|H01L2224/29186]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L24/29|H01L24/29]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L2224/16145|H01L2224/16145]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L2224/73253|H01L2224/73253]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L29/0673|H01L29/0673]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L29/401|H01L29/401]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L29/42392|H01L29/42392]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L29/66439|H01L29/66439]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L29/66545|H01L29/66545]] ({using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate}): 1 patents
 
* [[:Category:CPC_H01L29/775|H01L29/775]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L29/78696|H01L29/78696]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L23/5385|H01L23/5385]] (the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates ({): 1 patents
 
* [[:Category:CPC_H01L2224/08225|H01L2224/08225]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L2924/13081|H01L2924/13081]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L21/76807|H01L21/76807]] (Applying interconnections to be used for carrying current between separate components within a device {comprising conductors and dielectrics}): 1 patents
 
* [[:Category:CPC_H01L21/76816|H01L21/76816]] ({Aspects relating to the layout of the pattern or to the size of vias or trenches (layout of the interconnections per se): 1 patents
 
* [[:Category:CPC_G02B6/4295|G02B6/4295]] (Coupling light guides with opto-electronic elements): 1 patents
 
* [[:Category:CPC_H01L23/31|H01L23/31]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L22/32|H01L22/32]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L2224/0217|H01L2224/0217]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L2224/05556|H01L2224/05556]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L2224/13007|H01L2224/13007]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L23/5227|H01L23/5227]] ({Inductive arrangements or effects of, or between, wiring layers  (other inductive arrangements): 1 patents
 
* [[:Category:CPC_H01L21/566|H01L21/566]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L24/09|H01L24/09]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L24/30|H01L24/30]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L24/17|H01L24/17]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L2224/02373|H01L2224/02373]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
* [[:Category:CPC_H01L2224/0231|H01L2224/0231]] (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
 
  
 
=== Companies ===
 
=== Companies ===
Line 150: Line 117:
  
 
==== List of Companies ====
 
==== List of Companies ====
* Taiwan Semiconductor Manufacturing Company, Ltd.: 15 patents
+
* Taiwan Semiconductor Manufacturing Co., Ltd.: 13 patents
 +
* Taiwan Semiconductor Manufacturing CO., Ltd.: 1 patents
  
 
=== Collaborators ===
 
=== Collaborators ===
* [[:Category:Hsien-Wei Chen|Hsien-Wei Chen]][[Category:Hsien-Wei Chen]] (9 collaborations)
+
* [[:Category:Hsien-Wei Chen|Hsien-Wei Chen]][[Category:Hsien-Wei Chen]] (6 collaborations)
* [[:Category:Jie Chen|Jie Chen]][[Category:Jie Chen]] (5 collaborations)
+
* [[:Category:Chen-Hua Yu|Chen-Hua Yu]][[Category:Chen-Hua Yu]] (3 collaborations)
* [[:Category:Sung-Feng Yeh|Sung-Feng Yeh]][[Category:Sung-Feng Yeh]] (3 collaborations)
+
* [[:Category:Chih-Chia Hu|Chih-Chia Hu]][[Category:Chih-Chia Hu]] (3 collaborations)
* [[:Category:Tzuan-Horng Liu|Tzuan-Horng Liu]][[Category:Tzuan-Horng Liu]] (3 collaborations)
 
 
* [[:Category:Yun-Han Lee|Yun-Han Lee]][[Category:Yun-Han Lee]] (2 collaborations)
 
* [[:Category:Yun-Han Lee|Yun-Han Lee]][[Category:Yun-Han Lee]] (2 collaborations)
 
* [[:Category:Lee-Chung Lu|Lee-Chung Lu]][[Category:Lee-Chung Lu]] (2 collaborations)
 
* [[:Category:Lee-Chung Lu|Lee-Chung Lu]][[Category:Lee-Chung Lu]] (2 collaborations)
 +
* [[:Category:Sen-Bor Jan|Sen-Bor Jan]][[Category:Sen-Bor Jan]] (2 collaborations)
 
* [[:Category:Chao-Wen Shih|Chao-Wen Shih]][[Category:Chao-Wen Shih]] (2 collaborations)
 
* [[:Category:Chao-Wen Shih|Chao-Wen Shih]][[Category:Chao-Wen Shih]] (2 collaborations)
* [[:Category:Tze-Chiang Huang of Saratoga CA (US)|Tze-Chiang Huang of Saratoga CA (US)]][[Category:Tze-Chiang Huang of Saratoga CA (US)]] (1 collaborations)
+
* [[:Category:Sung-Feng Yeh|Sung-Feng Yeh]][[Category:Sung-Feng Yeh]] (2 collaborations)
 +
* [[:Category:Jie Chen|Jie Chen]][[Category:Jie Chen]] (2 collaborations)
 +
* [[:Category:Fong-Yuan Chang|Fong-Yuan Chang]][[Category:Fong-Yuan Chang]] (1 collaborations)
 +
* [[:Category:Noor Mohamed Ettuveettil|Noor Mohamed Ettuveettil]][[Category:Noor Mohamed Ettuveettil]] (1 collaborations)
 +
* [[:Category:Po-Hsiang Huang|Po-Hsiang Huang]][[Category:Po-Hsiang Huang]] (1 collaborations)
 +
* [[:Category:Chin-Chou Liu|Chin-Chou Liu]][[Category:Chin-Chou Liu]] (1 collaborations)
 +
* [[:Category:Yi-Kan Cheng|Yi-Kan Cheng]][[Category:Yi-Kan Cheng]] (1 collaborations)
 +
* [[:Category:Hsien-Pin Hu|Hsien-Pin Hu]][[Category:Hsien-Pin Hu]] (1 collaborations)
 +
* [[:Category:Jing-Cheng Lin|Jing-Cheng Lin]][[Category:Jing-Cheng Lin]] (1 collaborations)
 +
* [[:Category:Jiun Ren Lai|Jiun Ren Lai]][[Category:Jiun Ren Lai]] (1 collaborations)
 +
* [[:Category:Yung-Chi Lin|Yung-Chi Lin]][[Category:Yung-Chi Lin]] (1 collaborations)
 +
* [[:Category:Chin-Shyh Wang|Chin-Shyh Wang]][[Category:Chin-Shyh Wang]] (1 collaborations)
 +
* [[:Category:Chun-Chiang Kuo|Chun-Chiang Kuo]][[Category:Chun-Chiang Kuo]] (1 collaborations)
 
* [[:Category:Ying-Ju Chen|Ying-Ju Chen]][[Category:Ying-Ju Chen]] (1 collaborations)
 
* [[:Category:Ying-Ju Chen|Ying-Ju Chen]][[Category:Ying-Ju Chen]] (1 collaborations)
* [[:Category:Ching-Jung Yang|Ching-Jung Yang]][[Category:Ching-Jung Yang]] (1 collaborations)
+
* [[:Category:Chuan-An Cheng|Chuan-An Cheng]][[Category:Chuan-An Cheng]] (1 collaborations)
* [[:Category:Min-Chien Hsiao|Min-Chien Hsiao]][[Category:Min-Chien Hsiao]] (1 collaborations)
+
* [[:Category:Tzuan-Horng Liu|Tzuan-Horng Liu]][[Category:Tzuan-Horng Liu]] (1 collaborations)
* [[:Category:Nien-Fang Wu|Nien-Fang Wu]][[Category:Nien-Fang Wu]] (1 collaborations)
 
* [[:Category:Po-Yu Chen|Po-Yu Chen]][[Category:Po-Yu Chen]] (1 collaborations)
 
* [[:Category:Yu Hsiang Chen|Yu Hsiang Chen]][[Category:Yu Hsiang Chen]] (1 collaborations)
 
* [[:Category:Cheng Hung Wu|Cheng Hung Wu]][[Category:Cheng Hung Wu]] (1 collaborations)
 
* [[:Category:Wei-Pin Changchien|Wei-Pin Changchien]][[Category:Wei-Pin Changchien]] (1 collaborations)
 
* [[:Category:Chao-Hsiang Yang|Chao-Hsiang Yang]][[Category:Chao-Hsiang Yang]] (1 collaborations)
 
  
 
[[Category:Ming-Fa Chen]]
 
[[Category:Ming-Fa Chen]]
 
[[Category:Inventors]]
 
[[Category:Inventors]]
[[Category:Inventors filing patents with Taiwan Semiconductor Manufacturing Company, Ltd.]]
+
[[Category:Inventors filing patents with Taiwan Semiconductor Manufacturing Co., Ltd.]]
 +
[[Category:Inventors filing patents with Taiwan Semiconductor Manufacturing CO., Ltd.]]

Latest revision as of 02:13, 19 July 2024

Ming-Fa Chen

Executive Summary

Ming-Fa Chen is an inventor who has filed 14 patents. Their primary areas of innovation include {Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected} (8 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (7 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (7 patents), and they have worked with companies such as Taiwan Semiconductor Manufacturing Co., Ltd. (13 patents), Taiwan Semiconductor Manufacturing CO., Ltd. (1 patents). Their most frequent collaborators include (6 collaborations), (3 collaborations), (3 collaborations).

Patent Filing Activity

Ming-Fa Chen Monthly Patent Applications.png

Technology Areas

Ming-Fa Chen Top Technology Areas.png

List of Technology Areas

  • H01L24/80 ({Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected}): 8 patents
  • H01L24/08 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 7 patents
  • H01L2224/80895 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 7 patents
  • H01L2224/80896 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 7 patents
  • H01L25/50 ({Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group): 7 patents
  • H01L2224/08145 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
  • H01L25/0657 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
  • H01L2225/06541 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
  • H01L23/5386 (the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates ({): 3 patents
  • H01L21/4853 (Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups): 3 patents
  • H01L23/49816 (Leads, {i.e. metallisations or lead-frames} on insulating substrates, {e.g. chip carriers (shape of the substrate): 3 patents
  • H01L25/0655 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
  • H01L2224/08225 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
  • H01L23/5389 (the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates ({): 3 patents
  • H01L23/49827 ({Via connections through the substrates, e.g. pins going through the substrate, coaxial cables (): 3 patents
  • H01L25/0652 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
  • H01L25/18 (the devices being of types provided for in two or more different subgroups of the same main group of groups): 3 patents
  • H01L21/565 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
  • H01L23/3128 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
  • H01L23/5385 (the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates ({): 2 patents
  • H01L2224/94 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L2924/182 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L23/5226 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L24/09 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L2224/08146 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L21/6835 ({using temporarily an auxiliary support}): 2 patents
  • H01L24/16 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L2225/06524 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L2225/06589 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L2225/06586 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L23/481 (Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements {; Selection of materials therefor}): 2 patents
  • H01L25/105 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L2225/1035 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L2225/1058 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L21/4857 (Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups): 2 patents
  • H01L23/5383 ({Multilayer substrates (): 2 patents
  • H01L21/82 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
  • H01L23/5381 (the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates ({): 1 patents
  • H01L24/94 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/80203 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L23/5286 ({Geometry or} layout of the interconnection structure {(): 1 patents
  • H01L2224/08135 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/08137 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/08147 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L21/563 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L23/147 ({Semiconductor insulating substrates (semiconductor conductive substrates): 1 patents
  • H01L23/3121 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L23/49822 ({Multilayer substrates (multilayer metallisation on monolayer substrate): 1 patents
  • H01L24/81 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L24/97 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L23/3677 (Cooling facilitated by shape of device {(): 1 patents
  • H01L24/32 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L24/73 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L21/4882 (Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups): 1 patents
  • H01L2225/06517 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2924/16251 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2924/1632 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/16227 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/16237 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/32225 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/73204 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/08245 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/8083 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L21/76224 ({using trench refilling with dielectric materials (trench filling with polycristalline silicon): 1 patents
  • H01L21/7684 (Applying interconnections to be used for carrying current between separate components within a device {comprising conductors and dielectrics}): 1 patents
  • H01L21/76846 ({Layer combinations}): 1 patents
  • H01L23/585 ({comprising conductive layers or plates or strips or rods or rings (): 1 patents
  • H01L23/53295 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L29/0649 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L24/83 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L24/03 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L24/33 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L23/562 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2225/06568 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2225/06565 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2225/06593 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2225/06513 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2924/1434 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2924/1431 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L21/76898 ({formed through a semiconductor substrate}): 1 patents
  • H01L21/568 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2221/68372 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2225/06548 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/80006 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2225/06582 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L21/481 (Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups): 1 patents
  • H01L21/56 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2225/1041 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L21/4871 (Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups): 1 patents
  • H01L21/78 (with subsequent division of the substrate into plural individual devices (cutting to change the surface-physical characteristics or shape of semiconductor bodies): 1 patents
  • H01L22/12 ({for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions (electrical measurement of diffusions): 1 patents
  • H01L23/3675 (Cooling facilitated by shape of device {(): 1 patents
  • H01L24/19 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L24/20 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/214 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2924/19103 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L24/06 ({of a plurality of bonding areas}): 1 patents
  • H01L23/49503 (Lead-frames {or other flat leads (): 1 patents
  • H03K19/1776 (PULSE TECHNIQUE (measuring pulse characteristics): 1 patents
  • H01L23/49844 (Leads, {i.e. metallisations or lead-frames} on insulating substrates, {e.g. chip carriers (shape of the substrate): 1 patents
  • H01L23/42 (Fillings or auxiliary members in containers {or encapsulations} selected or arranged to facilitate heating or cooling): 1 patents

Companies

Ming-Fa Chen Top Companies.png

List of Companies

  • Taiwan Semiconductor Manufacturing Co., Ltd.: 13 patents
  • Taiwan Semiconductor Manufacturing CO., Ltd.: 1 patents

Collaborators

Subcategories

This category has the following 3 subcategories, out of 3 total.

C

H

M