Samsung electronics co., ltd. (20250062208). SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME: Difference between revisions
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[[Category:samsung electronics co., ltd.]] | [[Category:samsung electronics co., ltd.]] | ||
==Inventor(s)== | |||
[[:Category:Kyoung Lim Suk of Suwon-si (KR)|Kyoung Lim Suk of Suwon-si (KR)]][[Category:Kyoung Lim Suk of Suwon-si (KR)]] | |||
[[:Category:Kyung Don Mun of Suwon-si (KR)|Kyung Don Mun of Suwon-si (KR)]][[Category:Kyung Don Mun of Suwon-si (KR)]] | |||
[[:Category:Inhyung Song of Suwon-si (KR)|Inhyung Song of Suwon-si (KR)]][[Category:Inhyung Song of Suwon-si (KR)]] | |||
[[:Category:Yeonho Jang of Suwon-si (KR)|Yeonho Jang of Suwon-si (KR)]][[Category:Yeonho Jang of Suwon-si (KR)]] | |||
==SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME== | |||
This abstract first appeared for US patent application 20250062208 titled 'SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME | |||
==Original Abstract Submitted== | |||
a semiconductor package may include a first redistribution layer structure, a chiplet structure on the first redistribution layer structure, a plurality of first connection members on the first redistribution layer structure, a first molding material on the first redistribution layer structure and molding the chiplet structure and the plurality of first connection members, and a second redistribution layer structure on the first molding material. the chiplet structure may include a third redistribution layer structure, a first chiplet and a second chiplet on the third redistribution layer structure, and a bridge die on a bottom surface of the third redistribution layer structure. | |||
[[Category:H01L23/498]] | |||
[[Category:H01L23/00]] | |||
[[Category:H01L23/31]] | |||
[[Category:H01L25/00]] | |||
[[Category:H01L25/18]] | |||
[[Category:CPC_H01L23/49833]] |
Latest revision as of 03:56, 19 March 2025
SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME
Organization Name
Inventor(s)
Kyoung Lim Suk of Suwon-si (KR)
Kyung Don Mun of Suwon-si (KR)
SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME
This abstract first appeared for US patent application 20250062208 titled 'SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME
Original Abstract Submitted
a semiconductor package may include a first redistribution layer structure, a chiplet structure on the first redistribution layer structure, a plurality of first connection members on the first redistribution layer structure, a first molding material on the first redistribution layer structure and molding the chiplet structure and the plurality of first connection members, and a second redistribution layer structure on the first molding material. the chiplet structure may include a third redistribution layer structure, a first chiplet and a second chiplet on the third redistribution layer structure, and a bridge die on a bottom surface of the third redistribution layer structure.
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