Xilinx, Inc. Patent Application Trends in 2025

Xilinx, Inc. patent applications in 2025

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Top 10 Technology Areas

• G06F30/392 (Floor-planning or layout, e.g. partitioning or placement)
  • Count: 3 patents
  • Example: 20250036848. SYSTEMS AND METHODS FOR MACHINE LEARNING BASED VOLTAGE DROP PREDICTION FOR A 3D STACKED DEVICE (XILINX, INC.)
• G06F30/398 (Circuit design at the physical level (physical level design for reconfigurable circuits)
  • Count: 2 patents
  • Example: 20250036848. SYSTEMS AND METHODS FOR MACHINE LEARNING BASED VOLTAGE DROP PREDICTION FOR A 3D STACKED DEVICE (XILINX, INC.)
• G06F13/28 (using burst mode transfer, e.g. direct memory access {DMA}, cycle steal ()
  • Count: 2 patents
  • Example: 20250004919. HIGH PERFORMANCE TRACE OFFLOAD CIRCUIT ARCHITECTURE (Xilinx, Inc.)
• G06F15/7825 (ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models)
  • Count: 1 patents
  • Example: 20250068583. NETWORK-ON-CHIP ARCHITECTURE WITH DESTINATION VIRTUALIZATION (XILINX, INC.)
• G06F7/523 (ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models)
  • Count: 1 patents
  • Example: 20250004718. ONE-DIMENSIONAL CONVOLUTION BY BINARY SEGMENTATION ON DSP SLICES (XILINX, INC.)
• G06F9/3856 ({Reordering of instructions, e.g. using queues or age tags})
  • Count: 1 patents
  • Example: 20250004782. SYSTEMS AND METHODS FOR MANAGING ORDER OF COMMAND PROCESSING (Xilinx, Inc.)
• G06F9/3836 ({Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution})
  • Count: 1 patents
  • Example: 20250004782. SYSTEMS AND METHODS FOR MANAGING ORDER OF COMMAND PROCESSING (Xilinx, Inc.)
• G06F11/3648 ({using additional hardware})
  • Count: 1 patents
  • Example: 20250004919. HIGH PERFORMANCE TRACE OFFLOAD CIRCUIT ARCHITECTURE (Xilinx, Inc.)
• G06F11/0721 (Responding to the occurrence of a fault, e.g. fault tolerance)
  • Count: 1 patents
  • Example: 20250004919. HIGH PERFORMANCE TRACE OFFLOAD CIRCUIT ARCHITECTURE (Xilinx, Inc.)
• G06F11/273 (Tester hardware, i.e. output processing circuits {()
  • Count: 1 patents
  • Example: 20250004919. HIGH PERFORMANCE TRACE OFFLOAD CIRCUIT ARCHITECTURE (Xilinx, Inc.)

Emerging Technology Areas

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• H03M1/0602 (CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means)
  • Count: 1 patents
  • Example: 20250105851. MITIGATING GAIN MISMATCH INTERFERENCE IN ANALOG-TO-DIGITAL CONVERTER CIRCUITRY (XILINX, INC.)
• H01F27/2885 (MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES (ceramics based on ferrites)
  • Count: 1 patents
  • Example: 20250104904. INDUCTOR CIRCUITRY (XILINX, INC.)
• G06F30/3308 (ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models)
  • Count: 1 patents
  • Example: 20250103783. CO-SIMULATION ON A SYSTEM-ON-CHIP (Xilinx, Inc.)
• H04B17/14 (TRANSMISSION)
  • Count: 1 patents
  • Example: 20250088287. TRANSCEIVER LOOPBACK DATA PATH (Xilinx, Inc.)
• H04B1/48 (in circuits for connecting transmitter and receiver to a common transmission path, e.g. by energy of transmitter {()
  • Count: 1 patents
  • Example: 20250088287. TRANSCEIVER LOOPBACK DATA PATH (Xilinx, Inc.)
• H02H9/046 ({responsive to excess voltage appearing at terminals of integrated circuits (protection by specific structural integration design)
  • Count: 1 patents
  • Example: 20250088287. TRANSCEIVER LOOPBACK DATA PATH (Xilinx, Inc.)
• H04B17/0085 (Monitoring; Testing (of line transmission systems)
  • Count: 1 patents
  • Example: 20250088287. TRANSCEIVER LOOPBACK DATA PATH (Xilinx, Inc.)
• G06F9/5027 (Allocation of resources, e.g. of the central processing unit [CPU])
  • Count: 1 patents
  • Example: 20250086007. SCHEDULING KERNELS ON A DATA PROCESSING SYSTEM WITH ONE OR MORE COMPUTE CIRCUITS (Xilinx, Inc.)
• G06F9/4881 (Program initiating; Program switching, e.g. by interrupt)
  • Count: 1 patents
  • Example: 20250086007. SCHEDULING KERNELS ON A DATA PROCESSING SYSTEM WITH ONE OR MORE COMPUTE CIRCUITS (Xilinx, Inc.)
• H04L49/9005 (Buffering arrangements)
  • Count: 1 patents
  • Example: 20250030500. SYSTEM-LEVEL TECHNIQUES FOR ERROR CORRECTION IN CHIP-TO-CHIP INTERFACES (XILINX, INC.)

Top Inventors

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• Krishnan SRINIVASAN of San Jose CA (US) (4 patents)
• David Riddoch (3 patents)
• Ygal ARBEL of Morgan Hill CA (US) (2 patents)
• Mark Richard Nethercot (2 patents)
• Martin Rhodes (2 patents)
• Dmitri Kitariev of Irvine CA (US) (2 patents)
• Gareth David Edwards (2 patents)
• Martin L. VOOGEL of Niwot CO (US) (2 patents)
• Narendra Kumar PULIPATI (2 patents)
• Shidong ZHOU (2 patents)

Patent Categories

Geographical Distribution of Inventors

Geographical Distribution of US Inventors