US Patent Application 18227858. LANDING METAL ETCH PROCESS FOR IMPROVED OVERLAY CONTROL simplified abstract
LANDING METAL ETCH PROCESS FOR IMPROVED OVERLAY CONTROL
Organization Name
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Inventor(s)
Chih-Min Hsiao of Hsinchu (TW)
LANDING METAL ETCH PROCESS FOR IMPROVED OVERLAY CONTROL - A simplified explanation of the abstract
This abstract first appeared for US patent application 18227858 titled 'LANDING METAL ETCH PROCESS FOR IMPROVED OVERLAY CONTROL
Simplified Explanation
The patent application describes a method for manufacturing a semiconductor device.
- A hard mask layer is deposited on top of an insulating layer.
- The hard mask layer is etched to create an opening.
- A via recess is formed in the insulating layer through the opening.
- A first photoresist layer is applied on the hard mask layer and in the via recess.
- The first photoresist layer is etched to create a photoresist plug in the via recess.
- Portions of the hard mask layer on two opposite sides of the opening are etched to expose a portion of the insulating layer.
- The photoresist plug is removed.
- Metal is deposited in the via recess and on the exposed surface of the insulating layer.
- The metal is patterned.
Original Abstract Submitted
A method for manufacturing a semiconductor device includes depositing a hard mask layer on an upper surface of an insulating layer. The hard mask layer is etched to form an opening in the hard mask layer. A via recess is formed in the insulating layer through the opening. A first photoresist layer is formed on the hard mask layer and in the via recess. The first photoresist layer is etched to form a photoresist plug in the via recess. Two opposite sides of the opening are etched to remove portions of the hard mask layer and thereby a portion of the upper surface of the insulating layer is exposed. The photoresist plug is removed. Metal is deposited in the via recess and on the exposed surface of the insulating layer. The metal is patterned.