LASER ANNEAL FORMED NANOSHEET LDMOS TRANSISTOR

Organization Name

Inventor(s)

Henry Litzmann Edwards of Garland TX (US)

Sujatha Sampath of Salt Lake City UT (US)

LASER ANNEAL FORMED NANOSHEET LDMOS TRANSISTOR

This abstract first appeared for US patent application 20240413242 titled 'LASER ANNEAL FORMED NANOSHEET LDMOS TRANSISTOR

Original Abstract Submitted

a microelectronic device, e.g. an integrated circuit, includes first and second doped semiconductor regions over a semiconductor substrate. a semiconductor nanosheet layer is connected between the first and second semiconductor regions and has a bandgap greater than 1.5 ev. in some examples such a device is implemented as an ldmos transistor. a method of forming the device includes forming a trench in a semiconductor substrate having a first conductivity type. a semiconductor nanosheet stack is formed within the trench, the stack including a semiconductor nanosheet layer and a sacrificial layer. source and drain regions having an opposite second conductivity type are formed extending into the semiconductor nanosheet stack. the sacrificial layer between the source region and the drain region is removed, and the semiconductor nanosheet layer is annealed. a gate dielectric layer is formed on the semiconductor nanosheet layer, and a gate conductor is formed on the gate dielectric layer.