Texas instruments incorporated (20240411703). PROCESSOR ARCHITECTURE WITH MEMORY ACCESS CIRCUIT
PROCESSOR ARCHITECTURE WITH MEMORY ACCESS CIRCUIT
Organization Name
texas instruments incorporated
Inventor(s)
Timothy D. Anderson of University Park TX (US)
Joseph Zbiciak of San Jose CA (US)
Duc Quang Bui of Grand Prairie TX (US)
Abhijeet Chachad of Plano TX (US)
Naveen Bhoria of Plano TX (US)
Matthew D. Pierson of Murphy TX (US)
Ramakrishnan Venkatasubramanian of Plano TX (US)
PROCESSOR ARCHITECTURE WITH MEMORY ACCESS CIRCUIT
This abstract first appeared for US patent application 20240411703 titled 'PROCESSOR ARCHITECTURE WITH MEMORY ACCESS CIRCUIT
Original Abstract Submitted
disclosed embodiments include an electronic device having a processor core, a memory, a register, and a data load unit to receive a plurality of data elements stored in the memory in response to an instruction. all of the data elements hare the same data size, which is specified by one or more coding bits. the data load unit includes an address generator to generate addresses corresponding to locations in the memory at which the data elements are located, and a formatting unit to format the data elements. the register is configured to store the formatted data elements, and the processor core is configured to receive the formatted data elements from the register.
- Texas instruments incorporated
- Timothy D. Anderson of University Park TX (US)
- Joseph Zbiciak of San Jose CA (US)
- Duc Quang Bui of Grand Prairie TX (US)
- Abhijeet Chachad of Plano TX (US)
- Kai Chirca of Dallas TX (US)
- Naveen Bhoria of Plano TX (US)
- Matthew D. Pierson of Murphy TX (US)
- Daniel Wu of Plano TX (US)
- Ramakrishnan Venkatasubramanian of Plano TX (US)
- G06F12/1045
- G06F7/24
- G06F7/487
- G06F7/499
- G06F7/53
- G06F7/57
- G06F9/30
- G06F9/32
- G06F9/345
- G06F9/38
- G06F9/48
- G06F11/00
- G06F11/10
- G06F12/0862
- G06F12/0875
- G06F12/0897
- G06F12/1009
- G06F15/78
- G06F17/16
- H03H17/06
- CPC G06F12/1045