Tesla, inc. (20250006602). SEMICONDUCTOR PACKAGE WITH DIRECTIONAL LOCKING STRUCTURE
SEMICONDUCTOR PACKAGE WITH DIRECTIONAL LOCKING STRUCTURE
Organization Name
Inventor(s)
William Thomas Chi of Fremont CA US
Utkarsh Raheja of Sunnyvale CA US
Sesha Sai Srikant Sarma Gandikota of San Jose CA US
Steven Thomas Embleton of Austin TX US
SEMICONDUCTOR PACKAGE WITH DIRECTIONAL LOCKING STRUCTURE
This abstract first appeared for US patent application 20250006602 titled 'SEMICONDUCTOR PACKAGE WITH DIRECTIONAL LOCKING STRUCTURE
Original Abstract Submitted
the present disclosure relates to a semiconductor package. the semiconductor package includes a semiconductor die, molding material, and a conductive structure. the conductive structure is at least partly stacked with the semiconductor die, and the conductive structure includes a plurality of slots positioned around a point of the semiconductor die. the plurality of slots is configured to equalize thermal stresses during the operation of the semiconductor die about the point of the semiconductor die, where the thermal stresses are associated with coefficient of thermal expansion mismatches between the conductive structure and the molding material. in addition, at least a portion of the molding material is in contact with the conductive structure.