Taiwan semiconductor manufacturing company, ltd. (20250140294). SHARED DECODER CIRCUIT AND METHOD
SHARED DECODER CIRCUIT AND METHOD
Organization Name
taiwan semiconductor manufacturing company, ltd.
Inventor(s)
SHARED DECODER CIRCUIT AND METHOD
This abstract first appeared for US patent application 20250140294 titled 'SHARED DECODER CIRCUIT AND METHOD
Original Abstract Submitted
a memory circuit includes a control circuit configured to receive a clock signal including a clock cycle and output control signals based on the clock signal, an input circuit arrangement configured to, responsive to the control signals, pass a latched address to an output of the input circuit arrangement, the latched address including, during a first half of the clock cycle, a read address received at a first input port, and, during a second half of the clock cycle, a write address received at a second input port, an array of single-port memory cells, the memory circuit being configured to perform read and write operations during the respective first and second halves of the clock cycle, and a decoding circuit arrangement configured to, based on the latched address at the output, activate a row of memory cells of the array during each of the first and second clock cycle halves.