Circuitry for Power Management Assertion

Organization Name

taiwan semiconductor manufacturing company, ltd.

Inventor(s)

Circuitry for Power Management Assertion

This abstract first appeared for US patent application 20250061941 titled 'Circuitry for Power Management Assertion

Original Abstract Submitted

circuits and methods are described herein for controlling a bit line precharge circuit. for example, a control circuit includes a first latch circuit and a second latch circuit. the first latch circuit is configured to receive a first light sleep signal. the first latch circuit generates a second light sleep signal according to a clock signal. the second latch circuit is configured to receive the second light sleep signal. the second latch circuit generates a third light sleep signal according to a sense amplifier enable signal. the second latch circuit provides the third light sleep signal to a bit line reading switch, so the bit line reading switch is cutoff after a sense amplifier is enabled.