SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF

Organization Name

taiwan semiconductor manufacturing company, ltd.

Inventor(s)

Kao-Cheng Lin of Taipei City TW

Cheng-Yin Wang of Taipei City TW

Yen Lin Chung of Taipei City TW

Wei Min Chan of New Taipei City TW

Yen-Huei Chen of Hsinchu County TW

SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF

This abstract first appeared for US patent application 20250006815 titled 'SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF

Original Abstract Submitted

a method includes forming a first bottom-tier transistor; forming a second bottom-tier transistor, the first and second bottom-tier transistors sharing a same source/drain region; forming a first top-tier transistor over the first bottom-tier transistor, the first top-tier transistor comprising a first channel layer and a first gate structure around the first channel layer; forming a second top-tier transistor over the second bottom-tier transistor, the second top-tier transistor comprising a second channel layer and a second gate structure around the second channel layer, the first and second top-tier transistors sharing a same source/drain region, wherein from a top view, a first dimension of the first channel layer in a lengthwise direction of the first gate structure is different than a second dimension of the second channel layer in the lengthwise direction of the first gate structure.