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Taiwan semiconductor manufacturing co., ltd. (20250098296). INTEGRATED CIRCUIT WITH LATCH-UP IMMUNITY

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INTEGRATED CIRCUIT WITH LATCH-UP IMMUNITY

Organization Name

taiwan semiconductor manufacturing co., ltd.

Inventor(s)

Jing-Yi Lin of Taipei City TW

Chih-Chuan Yang of Tainan City TW

Shih-Hao Lin of Hsin-Chu TW

INTEGRATED CIRCUIT WITH LATCH-UP IMMUNITY

This abstract first appeared for US patent application 20250098296 titled 'INTEGRATED CIRCUIT WITH LATCH-UP IMMUNITY

Original Abstract Submitted

various embodiments of the present disclosure are directed towards a method for forming an integrated chip. the method includes forming an epitaxial structure having a first doping type over a first portion of a semiconductor substrate. a second portion of the semiconductor substrate is formed over the epitaxial structure and the first portion of the semiconductor substrate. a first doped region having the first doping type is formed in the second portion of the semiconductor substrate and directly over the epitaxial structure. a second doped region having a second doping type opposite the first doping type is formed in the second portion of the semiconductor substrate, where the second doped region is formed on a side of the epitaxial structure. a plurality of fins of the semiconductor substrate are formed by selectively removing portions of the second portion of the semiconductor substrate.

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