GATE-ALL-AROUND FIELD-EFFECT TRANSISTOR DEVICE

Organization Name

taiwan semiconductor manufacturing co., ltd.

Inventor(s)

Kuo-Cheng Chiang of Zhubei City (TW)

Huan-Chieh Su of Tianzhong Township (TW)

Shi Ning Ju of Hsinchu (TW)

Kuan-Ting Pan of Taipei City (TW)

Chih-Hao Wang of Baoshan Township (TW)

GATE-ALL-AROUND FIELD-EFFECT TRANSISTOR DEVICE - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240250123 titled 'GATE-ALL-AROUND FIELD-EFFECT TRANSISTOR DEVICE

The abstract describes a method of forming a semiconductor device with unique features such as semiconductor strips, isolation regions, hybrid fins, dummy gate structure, source/drain regions, and nanowires.

Semiconductor strips are formed protruding above a substrate with isolation regions between them.
Hybrid fins are created on the isolation regions, consisting of dielectric fins and dielectric structures over them.
A dummy gate structure is formed over the semiconductor strips.
Source/drain regions are formed over the semiconductor strips and on opposing sides of the dummy gate structure.
Nanowires are formed under the dummy gate structure, aligned with the semiconductor strips, with source/drain regions at opposing ends.
The hybrid fins are modified by reducing widths of center portions while keeping end portions unchanged.
An electrically conductive material is formed around the nanowires.

Potential Applications: - This technology can be applied in the semiconductor industry for advanced device fabrication. - It can enhance the performance and efficiency of semiconductor devices.

Problems Solved: - Provides a method for forming semiconductor devices with improved features and functionality. - Offers a unique approach to semiconductor device fabrication.

Benefits: - Enhanced performance and efficiency of semiconductor devices. - Improved integration of various components in semiconductor devices.

Commercial Applications: Title: Advanced Semiconductor Device Fabrication Method This technology can be utilized in the production of high-performance electronic devices, leading to advancements in various industries such as telecommunications, computing, and consumer electronics.

Questions about the technology: 1. How does this method differ from traditional semiconductor device fabrication techniques? - The method involves the unique formation of hybrid fins and nanowires, which can enhance device performance. 2. What are the potential scalability challenges associated with implementing this technology in mass production? - Scalability issues may arise due to the intricate process of forming hybrid fins and nanowires in large quantities.

Original Abstract Submitted

a method of forming a semiconductor device includes forming semiconductor strips protruding above a substrate and isolation regions between the semiconductor strips; forming hybrid fins on the isolation regions, the hybrid fins comprising dielectric fins and dielectric structures over the dielectric fins; forming a dummy gate structure over the semiconductor strip; forming source/drain regions over the semiconductor strips and on opposing sides of the dummy gate structure; forming nanowires under the dummy gate structure, where the nanowires are over and aligned with respective semiconductor strips, and the source/drain regions are at opposing ends of the nanowires, where the hybrid fins extend further from the substrate than the nanowires; after forming the nanowires, reducing widths of center portions of the hybrid fins while keeping widths of end portions of the hybrid fins unchanged, and forming an electrically conductive material around the nanowires.