Patent Applications by Taiwan Semiconductor Manufacturing Company Ltd on 4th September 2025

Taiwan Semiconductor Manufacturing Company Ltd: 37 patent applications

Taiwan Semiconductor Manufacturing Company Ltd has applied for patents in the areas of H10D84/038 (Technology classification, 7), H10D30/6735 (Technology classification, 5), H01L23/5226 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS, 4), H01L23/5283 ({Geometry or} layout of the interconnection structure {(, 4), H10D30/43 (Technology classification, 4)

Patent Applications by Taiwan Semiconductor Manufacturing Company Ltd

20250277575. COLOR DISPLAY WITH COLOR FILTER LAYER COMPRISING TWO-DIMENSIONAL PHOTONIC CRYSTALS FORMED IN A DIELECTRIC LAYER

Abstract: In a color display, a color filter layer includes a dielectric layer with an array of photonic crystals, an electroluminescent material disposed on the color filter layer, and electrodes arranged to electrically energize the electroluminescent material to output white light. Each photonic crystal in...

20250277752. OPTICAL INSPECTION SYSTEM, METHOD OF OPTICAL INSPECTION, AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE

Abstract: An optical inspection system includes a die carrier, a camera device, and a processor. The die carrier is configured to carry a die, wherein a backside surface of the die faces away from the die carrier. The camera device is movably disposed above the die carrier and configured to capture images of ...

20250277810. TESTING APPARATUS AND ITS CONDUCTIVE TERMINAL

Abstract: A testing apparatus includes a circuit board, a base and a conductive terminal. The circuit board includes a board body, a via portion penetrated through the board body, and an electrical contact located on one surface of the board body and electrically connected to the via portion. The base is loca...

20250277812. TESTING APPARATUS OF PACKAGED MODULES AND ITS MANUFACTURING METHOD

Abstract: A testing apparatus includes a circuit board, a socket and a conductive pad. The circuit board is provided with a plurality of contacts. The socket is mounted on the circuit board and provided with a receiving groove thereon. The conductive pad includes a three-dimensional stepped-stage structure an...

20250279138. FIRST FIRE OPERATION FOR OVONIC THRESHOLD SWITCH SELECTOR

Abstract: First fire operations for an ovonic threshold switch (OTS) selector is provided. A first fire operation includes setting a peak amplitude of a voltage pulse, and performing at least one cycle, including: providing the voltage pulse to the OTS selector; sensing an output current passing through the O...

20250279290. CHEMICAL DISPENSING SYSTEM

Abstract: A chemical dispensing system is capable of simultaneously supplying a semiconductor processing chemical for production and testing through the use of independent chemical supply lines, which reduces production downtime of an associated semiconductor process, increases throughput and capability of th...

20250279291. EXHAUST PIPIING FOR A SEMICONDUCTOR PROCESSING TOOL

Abstract: A semiconductor processing tool may include a processing tank. The semiconductor processing tool may include an arm arranged to hold a plurality of wafers over the processing tank such that wafers in the plurality of wafers are horizontally stacked over the processing tank. The semiconductor process...

20250279306. TRANSPORT CARRIER DOCKING DEVICE

Abstract: A transport carrier docking device may be capable of forming an air-tight seal around a transport carrier while a front portion of the transport carrier is inserted into a chamber of the transport carrier docking device. Semiconductor wafers in the transport carrier may be accessed by a transport to...

20250279352. INTERCONNECT STRUCTURE

Abstract: A semiconductor structure includes a transistor, a conductive via extending through a dielectric layer and electrically connected to the transistor, a metal cap disposed on a first surface of the conductive via and a first portion of a second surface of the dielectric layer, and a metal line dispose...

20250279353. MIDDLE-OF-LINE INTERCONNECT STRUCTURE AND MANUFACTURING METHOD

Abstract: In some embodiments, the present disclosure relates to an integrated circuit device. A transistor structure includes a gate electrode separated from a substrate by a gate dielectric and a pair of source/drain regions disposed within the substrate on opposite sides of the gate electrode. A lower cond...

20250279358. INTEGRATED CIRCUIT STRUCTURES AND METHODS OF FORMING THE SAME

Abstract: An integrated circuit structure includes a first die, a second die and the a heat dissipation structure. The first die includes a first device layer, a first front-side interconnect structure disposed on a front side of the first device layer, and a first backside interconnect structure disposed on ...

20250279360. VERTICAL BACK END OF LINE TRANSISTOR AND INTEGRATION WITH MEMORY CELL

Abstract: A back-end-of-line (BEOL) transistor includes a source electrode vertically stacked over a drain electrode and spaced apart from the drain electrode by a dielectric spacer between the first and second horizontal conductive layers. A semiconductor layer extends vertically between the source electrode...

20250279380. BOND PAD STRUCTURE WITH REDUCED STEP HEIGHT AND INCREASED ELECTRICAL ISOLATION

Abstract: Various embodiments of the present disclosure are directed towards an integrated chip. The integrated chip includes a substrate having an upper surface vertically below a top surface. A conductive structure is in the substrate. The conductive structure includes a first segment overlying the upper su...

20250279389. BONDING TOOL FOR BONDING DIES ONTO SUBSTRATES AND METHODS OF USE

Abstract: Embodiments of the present disclosure provide a bonding tool for bonding dies onto substrates and a method that includes positioning a substrate and a plurality of dies over a substrate support of a bonding tool, wherein the plurality of dies are disposed on the substrate, and the substrate is surro...

20250279390. METHOD FOR MANUFACTURING SEMICONDUCTOR PACKAGE DEVICE

Abstract: A method for manufacturing a semiconductor package device includes: forming a first semiconductor structure and a second semiconductor structure, the first semiconductor structure including a first dielectric bonding layer and a first conductive bonding feature disposed in the first dielectric bondi...