SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME

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SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME

This abstract first appeared for US patent application 20250125217 titled 'SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME

Original Abstract Submitted

disclosed are semiconductor packages and their fabrication methods. the semiconductor package comprises a first semiconductor chip, a second semiconductor chip on a top surface of the first semiconductor chip and having a width less than that of the first semiconductor chip, and a molding layer on the first semiconductor chip and surrounding the second semiconductor chip. the first semiconductor chip includes a first semiconductor substrate and a first circuit layer on a top surface of the first semiconductor substrate. the first semiconductor substrate includes a first part adjacent to the top surface of the first semiconductor substrate and a second part adjacent to a bottom surface of the first semiconductor substrate. the first and second parts include the same semiconductor material. the first part has a single crystalline structure. the second part may have a polycrystalline structure.