SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME

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SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME

This abstract first appeared for US patent application 20250125205 titled 'SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME

Original Abstract Submitted

a semiconductor package includes a first semiconductor chip including first pads, a second semiconductor chip including second pads in contact with the first pads, and through-electrodes electrically connected to the second pads and extending to a rear surface opposite to the front surface, a dielectric layer covering at least portions of the respective first and second semiconductor chips and having an inner surface facing the first and second semiconductor chips and an outer surface opposite the inner surface, and bump structures on a portion of the outer surface of the dielectric layer and electrically connected to the through-electrodes. the dielectric layer includes inorganic particles, and polymer chains bonded to at least one sides of the respective inorganic particles and connected toward the inner surface and the outer surface via the inorganic particles.