Samsung electronics co., ltd. (20250079365). SEMICONDUCTOR PACKAGE FOR INCREASING BONDING RELIABILITY
SEMICONDUCTOR PACKAGE FOR INCREASING BONDING RELIABILITY
Organization Name
Inventor(s)
Jing Cheng Lin of Suwon-si (KR)
SEMICONDUCTOR PACKAGE FOR INCREASING BONDING RELIABILITY
This abstract first appeared for US patent application 20250079365 titled 'SEMICONDUCTOR PACKAGE FOR INCREASING BONDING RELIABILITY
Original Abstract Submitted
a semiconductor package includes a first semiconductor chip and a second semiconductor chip hybrid-bonded to the first semiconductor chip. the first semiconductor chip includes first main pads, which are apart from each other, and a first bonding insulation layer extending around the first main pads. each of the first main pads includes first sub main pads apart from each other. the second semiconductor chip includes second main pads, which are spaced apart from each other, and a second bonding insulation layer extending around the second main pads. the second main pads are aligned with the first main pads. each of the second main pads includes second sub main pads spaced apart from each other. each of the second sub main pads is bonded to a respective one of the first sub main pads. the second bonding insulation layer is bonded to the first bonding insulation layer.