INTEGRATED CIRCUIT SEMICONDUCTOR DEVICE

Organization Name

samsung electronics co., ltd.

Inventor(s)

Dongkyu Lee of Suwon-si (KR)

Sungil Park of Suwon-si (KR)

Jaehyun Park of Suwon-si (KR)

Jinwook Yang of Suwon-si (KR)

Jinchan Yun of Suwon-si (KR)

Cheoljin Yun of Suwon-si (KR)

Daewon Ha of Suwon-si (KR)

Kyuman Hwang of Suwon-si (KR)

INTEGRATED CIRCUIT SEMICONDUCTOR DEVICE - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240282864 titled 'INTEGRATED CIRCUIT SEMICONDUCTOR DEVICE

Simplified Explanation: The patent application describes an integrated circuit semiconductor device with three-dimensional transistors that are vertically stacked to reduce unit area.

Two gate-all-around transistors or multi-bridge channel field effect transistors are used in the device.
The stacked transistors are separated by an isolation insulating layer.
The transistors are positioned on two opposite sides of the isolation insulating layer, with opposite structures.
Metal wiring layers are connected to the transistors at their far ends, away from the isolation insulating layer.
The method for manufacturing the device is also described in the patent application.

Potential Applications: This technology can be used in the manufacturing of integrated circuits for various electronic devices such as smartphones, computers, and other consumer electronics.

Problems Solved: The technology addresses the need for reducing unit area in integrated circuits and simplifying the manufacture of metal wiring layers connected to transistors.

Benefits: The technology results in reduced unit area, easier manufacture of metal wiring layers, and potentially improved performance of integrated circuits.

Commercial Applications: The technology can be applied in the semiconductor industry for the production of more compact and efficient integrated circuits, leading to cost savings and improved device performance.

Prior Art: Prior art related to this technology may include research on three-dimensional transistors, gate-all-around transistors, and multi-bridge channel field effect transistors in integrated circuits.

Frequently Updated Research: Researchers may be conducting studies on the optimization of three-dimensional transistors and their applications in various electronic devices.

Questions about Integrated Circuit Semiconductor Device with Three-Dimensional Transistors: 1. How does the technology of vertically stacked transistors contribute to reducing unit area in integrated circuits? 2. What are the potential challenges in manufacturing metal wiring layers connected to vertically stacked transistors?

Original Abstract Submitted

an integrated circuit semiconductor device with three dimensional transistors includes two gate-all-around transistors or multi-bridge channel field effect transistors may be vertically stacked to reduce unit area. the two stacked transistors may be separated by an isolation insulating layer. the two stacked transistors may be positioned on two opposite sides of the isolation insulating layer, with the structure of the two stacked transistors positioned in an opposite manner. according to embodiments of the present disclosure, metal wiring layers may be connected to the two stacked transistors at their far ends, away from the isolation insulating layer. a method for manufacturing an integrated circuit semiconductor device according to the present disclosure is described. accordingly, aspects described herein may result in reduced unit area and easy manufacture of metal wiring layer connected to the transistors.