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Samsung electronics co., ltd. (20240282830). SEMICONDUCTOR DEVICES simplified abstract

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SEMICONDUCTOR DEVICES

Organization Name

samsung electronics co., ltd.

Inventor(s)

Gyeom Kim of Suwon-si (KR)

Jinbum Kim of Suwon-si (KR)

Sangmoon Lee of Suwon-si (KR)

SEMICONDUCTOR DEVICES - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240282830 titled 'SEMICONDUCTOR DEVICES

The semiconductor device described in the abstract includes a substrate insulating layer, a gate structure, a source/drain region, and a backside contact plug.

  • The backside contact plug is positioned below the source/drain region with a second central axis offset from the first central axis in a horizontal direction.
  • The source/drain region consists of a first epitaxial layer with a non-silicon element in a first concentration, and a second epitaxial layer with a non-silicon element in a higher second concentration.
  • At least a portion of the upper surface of the backside contact plug is in contact with the second epitaxial layer.

Potential Applications: - This technology can be used in the manufacturing of advanced semiconductor devices for various electronic applications. - It can improve the performance and efficiency of integrated circuits in electronic devices.

Problems Solved: - Enhances the connectivity and functionality of semiconductor devices. - Improves the overall performance and reliability of electronic systems.

Benefits: - Increased efficiency and performance of semiconductor devices. - Enhanced connectivity and reliability in electronic systems.

Commercial Applications: Title: Advanced Semiconductor Device Technology for Enhanced Electronic Systems This technology can be utilized in the production of high-performance electronic devices such as smartphones, computers, and other consumer electronics. It can also be beneficial for industries requiring advanced semiconductor technology for their products.

Questions about the technology: 1. How does the offset central axis of the backside contact plug improve the performance of the semiconductor device? 2. What are the specific advantages of using a multi-layered epitaxial structure in the source/drain region of the device?


Original Abstract Submitted

a semiconductor device includes a substrate insulating layer; a gate structure extending in one direction on the substrate insulating layer; a source/drain region outside of the gate structure; and a backside contact plug below the source/drain region to have a second central axis offset from a first central axis of the source/drain region in a horizontal direction, and connected to the source/drain region, wherein the source/drain region includes a first epitaxial layer including a non-silicon element in a first concentration, and a second epitaxial layer on the first epitaxial layer and including a non-silicon element in a second concentration, higher than the first concentration, and at least a portion of an upper surface of the backside contact plug is in contact with the second epitaxial layer.

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