SEMICONDUCTOR PACKAGE INCLUDING STACKED SEMICONDUCTOR CHIPS

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SEMICONDUCTOR PACKAGE INCLUDING STACKED SEMICONDUCTOR CHIPS

This abstract first appeared for US patent application 20240258278 titled 'SEMICONDUCTOR PACKAGE INCLUDING STACKED SEMICONDUCTOR CHIPS

Original Abstract Submitted

a semiconductor package includes a lower semiconductor chip, a first semiconductor chip, a first through-electrode vertically penetrating the first semiconductor substrate, a first upper pad connected to the first through electrode, a first circuit layer disposed on the lower surface of the first semiconductor substrate, and a first lower pad disposed on a lower surface of the first circuit layer. a second semiconductor chip includes a second through-electrode spaced apart from the first through-electrode and vertically penetrating the second semiconductor substrate. a second upper pad is connected to the second through electrode. a second circuit layer is disposed on the lower surface of the second semiconductor substrate, and a second lower pad is connected to the second through-electrode on the lower surface of the second circuit layer through the second circuit layer and is integrally formed with the first upper pad.