Samsung electronics co., ltd. (20240120400). SEMICONDUCTOR DEVICE simplified abstract
SEMICONDUCTOR DEVICE
Organization Name
Inventor(s)
Dong Hoon Hwang of Suwon-si (KR)
In Chan Hwang of Suwon-si (KR)
SEMICONDUCTOR DEVICE - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240120400 titled 'SEMICONDUCTOR DEVICE
Simplified Explanation
The semiconductor device described in the abstract consists of various components such as nanosheets, isolation layers, source/drain regions, gate electrodes, gate cuts, through vias, and source/drain contacts. Here is a simplified explanation of the patent application:
- The semiconductor device includes lower and upper nanosheets, an isolation layer, source/drain regions, gate electrodes, gate cuts, through vias, and source/drain contacts.
- The first lower nanosheets are present at the bottom, followed by an upper isolation layer, first upper nanosheets, and first and second upper source/drain regions.
- A first gate electrode surrounds the lower nanosheets, isolation layer, and upper nanosheets, with a gate cut on one side extending from the lower to the upper surface of the gate electrode.
- A first through via inside the gate cut is insulated from the gate electrode.
- A first upper source/drain contact is electrically connected to the first upper source/drain region, and a second upper source/drain contact connects the second upper source/drain region with the first through via.
Potential Applications: - Advanced semiconductor devices - High-performance electronics - Nanotechnology research
Problems Solved: - Enhanced performance and efficiency of semiconductor devices - Improved integration of components in a compact space
Benefits: - Increased speed and reliability of electronic devices - Reduction in power consumption - Miniaturization of electronic components
Potential Commercial Applications: - Consumer electronics - Telecommunications industry - Automotive sector
Possible Prior Art: - Previous semiconductor devices with nanosheets and source/drain regions - Existing technologies for gate electrodes and through vias
Unanswered Questions: 1. How does the integration of upper and lower nanosheets impact the overall performance of the semiconductor device? 2. What specific materials are used in the fabrication of the gate electrodes and source/drain contacts, and how do they contribute to the device's functionality?
Original Abstract Submitted
a semiconductor device includes first lower nanosheets; an upper isolation layer on the first lower nanosheets; first upper nanosheets on the upper isolation layer; a first upper source/drain region on the first upper nanosheets; a second upper source/drain region on the first upper nanosheets; a first gate electrode surrounding the first lower nanosheets, the upper isolation layer, and the first upper nanosheets; a first gate cut on a side of the first gate electrode and extending from a lower surface of the first gate electrode to an upper surface of the first gate electrode; a first through via inside the first gate cut and insulated from the first gate electrode; a first upper source/drain contact on and electrically connected to the first upper source/drain region; and a second upper source/drain contact on the first upper source/drain region and electrically connecting the second upper source/drain region with the first through via.
