Samsung Electronics Co., Ltd. patent applications on April 17th, 2025
Patent Applications by Samsung Electronics Co., Ltd. on April 17th, 2025
Samsung Electronics Co., Ltd.: 165 patent applications
Samsung Electronics Co., Ltd. has applied for patents in the areas of H01L23/00 (19), H01L23/498 (9), H01L25/065 (9), H10B43/27 (8), H01L23/31 (8) H10B43/27 (4), H10B51/30 (2), H10B43/40 (2), G03F7/039 (2), H04W76/15 (2)
With keywords such as: device, layer, surface, semiconductor, memory, configured, substrate, including, structure, and based in patent application abstracts.
Patent Applications by Samsung Electronics Co., Ltd.
Inventor(s): Narae HAN of Suwon-si KR for samsung electronics co., ltd., Jaeheung LEE of Suwon-si KR for samsung electronics co., ltd., Namtae HEO of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): B23K26/06, B23K26/067, B23K26/082, B23K26/38, B23K26/70, B23K101/36
CPC Code(s): B23K26/0648
Abstract: a laser processing apparatus includes a stage configured to support a substrate to be processed, a laser light source configured to generate a laser beam, a mode converter configured to convert the laser beam into a cylindrical vector beam, a polarizing filter configured to polarize the cylindrical vector beam to form a double-o shaped beam in which two beams are arranged adjacent to each other in a first horizontal direction, a condensing lens configured to condense the double-o shaped beam into first and second laser beams at first and second spots apart in the first horizontal direction on the substrate, and a driving portion configured to move the first and second laser beams relatively with respect to the substrate in a second horizontal direction different from the first horizontal direction.
Inventor(s): Myungbeom PARK of Suwon-si KR for samsung electronics co., ltd., Sungbae KIM of Suwon-si KR for samsung electronics co., ltd., Jongsoo KIM of Suwon-si KR for samsung electronics co., ltd., Samjong CHOI of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): C01B23/00
CPC Code(s): C01B23/0068
Abstract: a method of recycling helium from a waste gas generated in a semiconductor process includes forming a first treatment gas by treating helium-containing waste gas emitted from a semiconductor process facility by using a scrubber module, transporting the first treatment gas to a purification facility, forming a first helium gas with a first purity by fractionating the first treatment gas in the purification facility, forming a second helium gas with a second purity by treating the first helium gas by using a back-end purification module in the purification facility, and providing the second helium gas to the semiconductor process facility.
Inventor(s): Hyungseon SONG of Suwon-si KR for samsung electronics co., ltd., Jooyoo KIM of Suwon-si KR for samsung electronics co., ltd., Yoobin BAE of Suwon-si KR for samsung electronics co., ltd., Jaepoong LEE of Suwon-si KR for samsung electronics co., ltd., Yoonhee CHOI of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): D06F34/28, D06F33/30, D06F105/48
CPC Code(s): D06F34/28
Abstract: a washing machine may include a drum, a driving device to rotate the drum, a control panel to receive input of a washing course and information indicating a reservation ending time, a memory to store information on time for proceeding with a washing course corresponding to an operation mode of a plurality of operation modes, and at least one processor configured to: obtain a target heating temperature lower than a set temperature of the washing course according to a general mode of the plurality of operating modes, based on a remaining time, being longer than a time to be spent in the general mode according to the stored information on time for proceeding with the washing course in the general mode, and control the driving device to proceed with the washing course in an operation mode of the plurality of operation modes based on the obtained target heating temperature.
20250122662. WASHING MACHINE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Hidekazu FUNAKOSHI of Yokohama-shi JP for samsung electronics co., ltd., Hiroshi KATSUMOTO of Yokohama-shi JP for samsung electronics co., ltd., Osamu KAZAMA of Yokohama-shi JP for samsung electronics co., ltd., Yasuo IKEDA of Yokohama-shi JP for samsung electronics co., ltd., Koichi HOSOMI of Yokohama-shi JP for samsung electronics co., ltd.
IPC Code(s): D06F37/30, D06F23/06, D06F33/36, D06F33/40, D06F33/48, D06F34/16, D06F37/04, D06F37/20, D06F39/08, D06F103/24, D06F103/26, D06F105/08, D06F105/48, D06F105/52
CPC Code(s): D06F37/304
Abstract: a washing machine including a fixed tank; a rotary drum accommodated in the fixed tank and into which laundry is loadable; a drain configured to discharge water collected in the fixed tank; a ball balancer installed in the rotary drum; a controller; and a driver configured to rotate the rotary drum, the driver including a shaft fixed to the rotary drum, and configured to be rotatable to rotate the rotary drum, a motor including a stator and a rotor, a reducer, and a clutch configured to be switched between a first mode in which rotation of the rotor is transmitted to the shaft through the reducer, and a second mode in which the rotation of the rotor is transmitted to the shaft without passing through the reducer.
20250123004. OVEN_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Hyeong Jin JANG of Seoul KR for samsung electronics co., ltd., Sang-Jin LEE of Hwaseong-si KR for samsung electronics co., ltd., Jung Hak LEE of Suwon-si KR for samsung electronics co., ltd., Myoung Keun KWON of Seoul KR for samsung electronics co., ltd., Sang Jun PARK of Yongin-si KR for samsung electronics co., ltd., Eung Ryeol SEO of Suwon-si KR for samsung electronics co., ltd., Han Jun SUNG of Seoul KR for samsung electronics co., ltd.
IPC Code(s): F24C15/00, F24C7/04, F24C7/08, F24C15/32, F27D21/02
CPC Code(s): F24C15/008
Abstract: an oven includes a main body, a cooking compartment provided in the main body and having a front surface thereof is opened, the cooking compartment having an opening, a camera provided above the cooking compartment and configured to capture an inside of the cooking compartment through the opening, a camera cooling fan disposed above the camera and configured to cool the camera by suctioning external air, a first glass provided at the opening of the cooking compartment so that the camera captures the inside of the cooking compartment and configured to block transmission of heat in the cooking compartment to the camera, and a second glass provided between the camera and the first glass and configured to additionally block the transmission of heat to the camera.
Inventor(s): Jimin HONG of Suwon-si KR for samsung electronics co., ltd., Jungwoo YOO of Suwon-si KR for samsung electronics co., ltd., Insub LEE of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): F25B21/02
CPC Code(s): F25B21/02
Abstract: disclosed is a thermoelectric element cooling device including: a thermoelectric element having an endothermic surface and an exothermic surface; a first heat dissipation plate connected to the endothermic surface and configured to dissipate heat to the endothermic surface; a first heat exchanger configured to transfer heat to the first heat dissipation plate; a second heat dissipation plate configured to dissipate heat received from the exothermic surface to a second heat exchanger; the second heat exchanger configured to release heat received from the second heat dissipation plate to the outside; and a thermoconductive member disposed at at least one position between the endothermic surface of the thermoelectric element and the first heat dissipation plate or between the exothermic surface and the second heat dissipation plate, wherein the thermoconductive member has: one side in contact with one of the surfaces of the thermoelectric element; and the other side in contact with the first heat dissipation plate or the second heat dissipation plate, the thermoconductive member includes a plurality of anisotropic, thermoconductive fillers, and at least one of the plurality of anisotropic, thermoconductive fillers is located adjacent to the one side and the other side.
Inventor(s): Taeil KIM of Suwon-si KR for samsung electronics co., ltd., Naeseong LEE of Suwon-si KR for samsung electronics co., ltd., Minwoo LEE of Suwon-si KR for samsung electronics co., ltd., Min CHANG of Suwon-si KR for samsung electronics co., ltd., Sangyoon HAN of Suwon-si KR for samsung electronics co., ltd., Seokhyun JANG of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): F25B41/31, F25B30/02
CPC Code(s): F25B41/31
Abstract: a heat pump system may include a compressor, a water-refrigerant heat exchanger, an expansion valve, an outdoor heat exchanger, an outlet temperature sensor configured to detect an outlet temperature of the water-refrigerant heat exchanger, an outside temperature sensor, a discharge pressure sensor, a suction pressure sensor, and at least one processor. the at least one processor may obtain, during a heating operation, a first target discharge temperature of the compressor based on an output value from the outlet temperature sensor and an output value from the outside temperature sensor, obtain a second target discharge temperature of the compressor based on an output value from the discharge pressure sensor and an output value from the suction pressure sensor, set any one of the first target discharge temperature or the second target discharge temperature to a final target discharge temperature, and control the expansion valve based on the final target discharge temperature.
20250123046. REFRIGERATOR_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Jinhong YU of Suwon-si KR for samsung electronics co., ltd., Chanbin PARK of Suwon-si KR for samsung electronics co., ltd., Seyeun CHANG of Suwon-si KR for samsung electronics co., ltd., Deulre MIN of Suwon-si KR for samsung electronics co., ltd., Jungeun SEO of Suwon-si KR for samsung electronics co., ltd., Jisick HWANG of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): F25D11/02, F25D17/04, F25D23/12
CPC Code(s): F25D11/02
Abstract: a refrigerator may include an inner case that forms a storage compartment, a duct facing along a rear wall of the inner case and configured to guide cold air into the storage compartment, a temperature control compartment within the storage compartment, the temperature control compartment to have a temperature independent of a temperature of the storage compartment, and a heating assembly configured to control the temperature of the temperature control compartment, the heating assembly including a heater, a connector configured to supply power to the heater and mountable on the duct so as to face the rear wall of the inner case, and a heater case accommodating the heater and configured to cover the connector mounted on the duct so that with the connector mounted on the duct, moisture which flows or condenses on the duct is prevented and/or reduced from entering the connector.
20250123047. REFRIGERATOR_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Chanbin PARK of Suwon-si KR for samsung electronics co., ltd., Jinhong YU of Suwon-si KR for samsung electronics co., ltd., Seyeun CHANG of Suwon-si KR for samsung electronics co., ltd., Junghun LEE of Suwon-si KR for samsung electronics co., ltd., Hyoju HAN of Suwon-si KR for samsung electronics co., ltd., Jisick HWANG of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): F25D17/06, F25D17/08
CPC Code(s): F25D17/065
Abstract: a refrigerator may include an inner case that forms a storage compartment; a temperature control room inside the storage compartment and configured so that a temperature of the temperature control compartment is independent of a temperature of the storage compartment; and a fan assembly configured to cool the temperature control room, including, a fan case including an inlet configured to communicate with the storage compartment and an outlet configured to communicate with the temperature control room, and a fan accommodated in the fan case and configured to move air inside the storage compartment through the inlet and to discharge air through the outlet to the temperature control room so that air from inside the storage compartment is moved into the temperature control room.
Inventor(s): Michael Jong Hoon CHON of Medford MA US for samsung electronics co., ltd.
IPC Code(s): G01N27/413, G01N27/30, G01N27/406, H01M10/42
CPC Code(s): G01N27/413
Abstract: an electrochemical cell includes at least two first electrodes, a separator layer, a common second electrode, an ionically conductive electrolyte, a base, and a lid, wherein the common second electrode is embedded in the base and the at least two first electrodes are embedded in the lid, the separator layer is ionically conductive and separates the at least two first electrodes from the common second electrode, the ionically conductive electrolyte creates an ionic pathway between the at least two working electrodes and the reference electrode, the base and lid are sealed against each other with an o-ring, each first electrode is sealed against the lid by an o-ring, at least one first electrode is electrically independent from all other first electrodes, and the lid has at least one hole, wherein the at least one hole can have at least one first electrode that is part of at least one cell.
Inventor(s): Hyeon Bo SHIM of Suwon-si KR for samsung electronics co., ltd., Souk KIM of Suwon-si KR for samsung electronics co., ltd., Younghoon SOHN of Suwon-si KR for samsung electronics co., ltd., Jaeho KIM of Suwon-si KR for samsung electronics co., ltd., Inseok PARK of Suwon-si KR for samsung electronics co., ltd., Jaewon YANG of Suwon-si KR for samsung electronics co., ltd., Minho RIM of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G01N29/04, G01N29/24
CPC Code(s): G01N29/041
Abstract: a semiconductor substrate inspection device is provided and includes: a function generator that generates a first signal and a second signal; an ultrasonic generator that receives the first signal generated from the function generator, generates an ultrasonic wave based on the first signal, and generates a surface wave signal on an upper surface of a substrate using the ultrasonic wave; and an electron beam measurer that inspects the surface wave signal, wherein the electron beam measurer includes: a laser light source that receives the second signal generated from the function generator and generates a first pulse laser beam based on the second signal; an electron beam generator that receives the first pulse laser beam and generates an electron beam that is emitted onto the upper surface of the substrate; and a backscattered electron detector that detects backscattered electrons generated based on the electron beam being incident on the substrate.
Inventor(s): Haewook PARK of Suwon-si KR for samsung electronics co., ltd., Sungyeol KIM of Suwon-si KR for samsung electronics co., ltd., Junhyung KIM of Suwon-si KR for samsung electronics co., ltd., Seongkwan LEE of Suwon-si KR for samsung electronics co., ltd., Jaemoo CHOI of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G01R31/28, H01L21/66
CPC Code(s): G01R31/2877
Abstract: a semiconductor test device includes a test chamber having at least one device under test disposed therein. a test module tests the at least one device under test. a signal connection device electrically connects the at least one device under test and the test module to each other. the signal connection device includes an electrically conductive thermal insulator (ecti). the ecti has electrical conductivity greater than or equal to about 1700 s/cm and thermal conductivity less than or equal to about 2.2 w/mk.
Inventor(s): Hyungdong ROH of Suwon-si KR for samsung electronics co., ltd., Jihun CHOI of Seoul-si KR for samsung electronics co., ltd., Jaedo KIM of Seoul-si KR for samsung electronics co., ltd., Jeongjin ROH of Seoul-si KR for samsung electronics co., ltd., Youngjae CHO of Suwon-si KR for samsung electronics co., ltd., Michael CHOI of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G01R31/317
CPC Code(s): G01R31/31709
Abstract: a jitter measurement circuit for measuring a jitter of an input signal, the jitter measurement circuit including: a multiplexer configured to output a first comparison signal or a second comparison signal in response to an output signal; a detecting circuit configured to output a detection signal corresponding to a phase difference between an output of the multiplexer and the input signal; a first adder configured to sum the detection signal and a feedback signal; an integrating circuit configured to integrate and output an output of the first adder; a feedback circuit configured to trim an output of the integrating circuit to generate the feedback signal; and a comparator configured to generate an output signal by comparing the output of the integrating circuit with a reference potential.
Inventor(s): Jauk GU of Suwon-si KR for samsung electronics co., ltd., Eunho LEE of Suwon-si KR for samsung electronics co., ltd., Changhyeon KIM of Suwon-si KR for samsung electronics co., ltd., Youngdae SHIM of Suwon-si KR for samsung electronics co., ltd., Jinhoon PARK of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G01S13/86, G01N22/04, G01N27/90, G01N33/38, G01S13/88
CPC Code(s): G01S13/86
Abstract: a measuring apparatus for a concrete structure includes an eddy current sensor configured to contact the concrete structure; a ground penetrating radar (gpr) sensor configured to contact the concrete structure; at least one memory storing one or more instructions; and a controller operably connected to the eddy current sensor, the gpr sensor, and the at least one memory, wherein the one or more instructions, when executed by the controller, cause the apparatus to: provide a first input signal to the eddy current sensor and a second input signal to the gpr sensor, obtain a first moisture content of a portion of the concrete structure based on an output of the eddy current sensor, obtain a second moisture content of the portion of the concrete structure based on an output of the gpr sensor, and obtain a final moisture content of the portion of the concrete structure based on at least one of the first moisture content and the second moisture content.
Inventor(s): Junghoon Kang of Suwon-si KR for samsung electronics co., ltd., Daegon Kim of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G02B6/42
CPC Code(s): G02B6/4206
Abstract: provided is a semiconductor package including a package substrate and a photonic integrated circuit chip arranged on the package substrate, having a groove extending from a lateral surface of the photonic integrated circuit chip to the inside of the photonic integrated circuit chip, and including a photoelectric converter, wherein the photoelectric converter includes a light-emitting device configured to generate an optical signal, a first waveguide connected to the light-emitting device and providing a path through which the optical signal travels, a first grating coupler configured to output the optical signal, a second waveguide connected to first grating coupler, and a tunable coupler connected to the first waveguide and the second waveguide.
Inventor(s): Byungseok SOH of Suwon-si KR for samsung electronics co., ltd., Bonseuk Goo of Suwon-si KR for samsung electronics co., ltd., Youngtae Kim of Suwon-si KR for samsung electronics co., ltd., Kibum Seong of Suwon-si KR for samsung electronics co., ltd., Youngchol Lee of Suwon-si KR for samsung electronics co., ltd., Weonhee Lee of Suwon-si KR for samsung electronics co., ltd., Yongseok Jang of Suwon-si KR for samsung electronics co., ltd., Eunseok Choi of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G03B21/14, G03B5/00, G06T11/60, G06V10/25
CPC Code(s): G03B21/142
Abstract: an electronic device includes: at least one sensor; a projector configured to project an image; memory storing at least one instruction; and at least one processor, wherein the at least one processor is configured to execute the at one instruction to: obtain information about a projection surface using the at least one sensor, identify a first area of interest in an image to be projected on the projection surface, obtain a projection image by cropping a portion of the image to include at least a portion of the first area of interest, based on the information about the projection surface and information about the first area of interest, and control the projector to project the projection image on the projection surface.
Inventor(s): Jaejun LEE of Suwon-si KR for samsung electronics co., ltd., Cheol KANG of Suwon-si KR for samsung electronics co., ltd., Hana KIM of Suwon-si KR for samsung electronics co., ltd., Sungan DO of Hwaseong-si KR for samsung electronics co., ltd., Yonghoon MOON of Hwaseong-si KR for samsung electronics co., ltd.
IPC Code(s): G03F7/039, C08F218/00, C08F220/18, C08F220/30
CPC Code(s): G03F7/039
Abstract: provided are a polymer including a first repeating unit represented by formula 1 below and a second repeating unit represented by formula 2 below, a resist composition including the same, and a method of forming a pattern using the same.
Inventor(s): Jaejun LEE of Suwon-si KR for samsung electronics co., ltd., Cheol KANG of Suwon-si KR for samsung electronics co., ltd., Hana KIM of Suwon-si KR for samsung electronics co., ltd., Sungan DO of Hwaseong-si KR for samsung electronics co., ltd., Yonghoon MOON of Hwaseong-si KR for samsung electronics co., ltd.
IPC Code(s): G03F7/039, C08F218/00, C08F220/18, C08F220/30
CPC Code(s): G03F7/039
Abstract:
Inventor(s): Jaejun LEE of Suwon-si KR for samsung electronics co., ltd., Cheol KANG of Suwon-si KR for samsung electronics co., ltd., Hana KIM of Suwon-si KR for samsung electronics co., ltd., Sungan DO of Hwaseong-si KR for samsung electronics co., ltd., Yonghoon MOON of Hwaseong-si KR for samsung electronics co., ltd.
IPC Code(s): G03F7/039, C08F218/00, C08F220/18, C08F220/30
CPC Code(s): G03F7/039
Abstract: in formulae 1 and 2, lto l, lto l, a11 to a13, a21 to a24, a, a, x, r, r, rto r, b12, b22, b23, p11 and p21 are as described above in the specification.
Inventor(s): Chanjae AHN of Suwon-si KR for samsung electronics co., ltd., Myungwoong KIM of Incheon KR for samsung electronics co., ltd., Yoonhyun KWAK of Suwon-si KR for samsung electronics co., ltd., Yunhee KO of Incheon KR for samsung electronics co., ltd., Seungjun KIM of Incheon KR for samsung electronics co., ltd.
IPC Code(s): G03F7/039, C08F212/14, G03F7/00, G03F7/038
CPC Code(s): G03F7/039
Abstract: provided are a resist composition and a method of forming a pattern by using the same, the resist composition including a polymer including a first repeating unit represented by formula 1, a photoacid generator, and an organic solvent:
Inventor(s): Chanjae AHN of Suwon-si KR for samsung electronics co., ltd., Myungwoong KIM of Incheon KR for samsung electronics co., ltd., Yoonhyun KWAK of Suwon-si KR for samsung electronics co., ltd., Yunhee KO of Incheon KR for samsung electronics co., ltd., Seungjun KIM of Incheon KR for samsung electronics co., ltd.
IPC Code(s): G03F7/039, C08F212/14, G03F7/00, G03F7/038
CPC Code(s): G03F7/039
Abstract:
20250123573. LITHOGRAPHY APPARATUS_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Sung Yong BAE of Suwon-si KR for samsung electronics co., ltd., Hyeon Jin KIM of Suwon-si KR for samsung electronics co., ltd., Jeong-Gil KIM of Suwon-si KR for samsung electronics co., ltd., Kyoung Hwan OH of Suwon-si KR for samsung electronics co., ltd., Dong Jin LEE of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G03F7/00
CPC Code(s): G03F7/70758
Abstract: a lithography apparatus comprises a wafer stage, a cable configured to be bent as the wafer stage moves, a first support configured to prevent the cable from sagging, and to support the cable to maintain a bent state of the cable when the cable moves, a first rail installed on a first side of the cable, and including curved track extending in a direction from a lower portion of the cable toward an upper portion of the cable, wherein the first rail includes a concave first surface, a second rail installed on a second side of the cable opposite the first side of the cable, and including curved track extending in the direction from the lower portion of the cable toward the upper portion of the cable, wherein the second rail includes a concave second surface.
Inventor(s): Sunghun CHO of Suwon-si KR for samsung electronics co., ltd., Juri LEE of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G05F1/575
CPC Code(s): G05F1/575
Abstract: a voltage regulator configured to generate an output voltage includes a comparison unit configured to generate a second voltage based on a reference voltage and a first voltage generated by a feedback of the output voltage, a power noise replica buffer unit configured to generate a third voltage including a power noise copied based on the second voltage, and a pass transistor configured to generate the output voltage in response to the third voltage.
Inventor(s): Ho-seong SEO of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06F1/16, H04M1/02
CPC Code(s): G06F1/1652
Abstract: an electronic device includes a first and second body, a hinge unit configured to connect to the first and second body, and a flexible display disposed on the hinge unit, the first, and second body, wherein the hinge unit includes a bendable support member supported by the first and second body, and a plurality of slit members, wherein each slit member includes a fixed end that is supported by the support member and a free end that extends toward the flexible display, and wherein the plurality of slit members are arranged in a longitudinal direction relative to the flexible display and are spaced apart by an interval, wherein the free ends limit a curvature of the flexible display in a folded state by moving closer to each other and touching.
Inventor(s): Hyungmin LEE of Suwon-si KR for samsung electronics co., ltd., Jun KIM of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06F1/16, G06F3/0485, G06F3/14
CPC Code(s): G06F1/1677
Abstract: an electronic device according to an embodiment may include: a first housing; a second housing; a hinge structure including a hinge configured to couple the second housing to the first housing to be rotatable with respect to the first housing; a flexible display disposed at the first housing and the second housing; memory comprising one or more storage mediums storing instructions; a sensor configured to detect an angle between the first housing and the second housing; and at least one processor, comprising processing circuitry, operatively coupled to the flexible display, the memory, and the sensor, wherein at least one processor, individually and/or collectively, may be configured to control the electronic device to: display a first screen within a first portion among the first portion and a second portion of the flexible display based on detecting, using the sensor, an angle included within a specified range; and display, within the second portion, a second screen for reflection of the first screen by the second portion while displaying the first screen within the first portion.
Inventor(s): Hyeryoung CHOI of Suwons-i KR for samsung electronics co., ltd.
IPC Code(s): G06F3/01, G02F1/1333, G02F1/1335, G09G3/36
CPC Code(s): G06F3/013
Abstract: an electronic apparatus including a mirror display configured to be operated in a mirror state and a display state; a sensor; and at least one processor configured to switch an operation state of the electronic apparatus from a horizontal state, in which the mirror display is operated in a horizontal orientation, to a vertical state, in which the mirror display is operated in a vertical orientation, and, while the operation state of electronic apparatus is the vertical state, identify, based on data acquired through the sensor, whether a user is located within a predetermined distance of the electronic apparatus for a predetermined time, and, when it is identified that the user is located within the predetermined distance of the electronic apparatus for the predetermined time, control the mirror display to be operated in the mirror state based on a user gaze location.
Inventor(s): Dongil SON of Suwon-si KR for samsung electronics co., ltd., Dukhyun KIM of Suwon-si KR for samsung electronics co., ltd., Sangheon KIM of Suwon-si KR for samsung electronics co., ltd., Junsung KIM of Suwon-si KR for samsung electronics co., ltd., Yoechan SONG of Suwon-si KR for samsung electronics co., ltd., Yeunwook LIM of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06F3/0482, G06F40/169
CPC Code(s): G06F3/0482
Abstract: an electronic device includes: a display, at least one processor, comprising processing circuitry, and a memory configured to store instructions, wherein the instructions when executed by the at least one processor, individually and/or collectively, cause the electronic device to: based on a first input of a user being obtained for an application, attempt to look up events accumulated in an event list for events that are not checked by the user for the application, based on events being looked up in the event list, generate summary information summarizing the looked-up events from the event information of the looked-up events, and, display a graphic object corresponding to the generated summary information in a region of the display corresponding to the application.
Inventor(s): SEONGWOOK PARK of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06F3/06
CPC Code(s): G06F3/0608
Abstract: a memory system includes an external memory device and a first memory processing unit of a main memory device. the external memory device and a host may be disposed on different boards, and the external memory device may transfer compressed data to the host in response to a swap-in request from the host. the first memory processing unit and the host may be disposed on the same board. the first memory processing unit may load the compressed data, decompress the compressed data to obtain decompressed data, and store the decompressed data in a main memory of the main memory device.
Inventor(s): Daehyun KIM of Suwon-si KR for samsung electronics co., ltd., Suhyun KIM of Suwon-si KR for samsung electronics co., ltd., Ikkyun PARK of Suwon-si KR for samsung electronics co., ltd., Hyunju YI of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06F3/06
CPC Code(s): G06F3/0619
Abstract: an embodiment of the method includes transferring a first read command corresponding to a first cell region of the memory device through a first channel, receiving first data, read from the first cell region, from the memory device through a second channel physically separated from the first channel, transferring a status information request command through the first channel, the status information request command request the transfer of status information about a second cell region of the memory device, receiving the status information about the second cell region from the memory device through the first channel, and transferring a second read command corresponding to the second cell region of the memory device through the first channel, at least a portion of a period in which the status information is received through the first channel overlaps a period where the first data is received through the second channel.
Inventor(s): Youngsik LEE of Suwon-si KR for samsung electronics co., ltd., Seunghyun SHIN of Hwaseong-si KR for samsung electronics co., ltd., Sunmi YOO of Seoul KR for samsung electronics co., ltd.
IPC Code(s): G06F3/06
CPC Code(s): G06F3/0619
Abstract: provided are a storage device and an operating method thereof. the storage device includes a non-volatile memory including a plurality of memory regions and a storage controller configured to control the non-volatile memory through a performance path and at least one direct path, the storage controller including a buffer memory configured to store recovery data, wherein the storage controller writes the recovery data to the non-volatile memory through the at least one direct path in response to power being cut off and a fault being detected in the performance path, the performance path is a path for performing a write operation, a read operation, and an erase operation, and the at least one direct path is a path for performing only a write operation.
Inventor(s): Amit Berman of Tel-Aviv IE for samsung electronics co., ltd.
IPC Code(s): G06F3/06
CPC Code(s): G06F3/0659
Abstract: a method for accelerating computational storage in an all-flash-array that comprises a plurality of solid state drives (ssds) connected in a ring topology. the method includes receiving, by a controller of a first ssd, a request to read or write data from a dynamic random access memory (dram) associated with the first ssd, creating a packet that includes an identifier for the first ssd in the ring topology, an identifier for the packet, and a read/write flag that identifies the request, and transmitting the packet to a next ssd in the ring topology. when the request is a read request and a read data address is not located in the dram, the read/write flag indicates a read-request, and when the request is a write request and the dram is full, the read/write flag indicates a write-request, and the packet includes data to be written.
Inventor(s): Youngmin JO of Hwaseong-si KR for samsung electronics co., ltd., Tongsung KIM of Suwon-si KR for samsung electronics co., ltd., Chiweon YOON of Seoul KR for samsung electronics co., ltd., Seonkyoo LEE of Hwaseong-si KR for samsung electronics co., ltd., Byunghoon JEONG of Hwaseong-si KR for samsung electronics co., ltd.
IPC Code(s): G06F3/06, G11C16/04, G11C16/10, G11C16/26, H03K19/00, H10B43/27
CPC Code(s): G06F3/0659
Abstract: a method of operating a storage device including first and second memory devices and a memory controller, which are connected to a single channel, the method including: transmitting first data output from the first memory device to the memory controller through a data signal line in the single channel; and transmitting a command to the second memory device through the data signal line while the memory controller receives the first data, wherein a voltage level of the data signal line is based on the command and the first data of the first memory device is loaded on the data signal line, and the first data and the command are transmitted in both directions of the data signal line.
Inventor(s): Kyeong NAMKOONG of Suwon-si KR for samsung electronics co., ltd., Gwanhyung KIM of Suwon-si KR for samsung electronics co., ltd., Yeongjun KWON of Suwon-si KR for samsung electronics co., ltd., Huijun SHIM of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06F3/14, G06F3/0354, G06F3/042, G06F3/044, G06F3/147, H04N23/66
CPC Code(s): G06F3/1454
Abstract: an electronic device includes a display including a touch module, a communication interface, a camera, a sensor, and one or more processors is configured to execute a video call application, control the communication interface to transmit a captured image obtained through the camera to at least one external device connected through the video call application, and based on a touch input being received through the touch module of the display or the touch input being predicted based on at least one of a signal detected through the sensor or a signal received from an input device enabled to receive the touch input, control the communication interface to transmit a screen image of the display to the at least one external device.
Inventor(s): Sojeong SHIM of Suwon-si KR for samsung electronics co., ltd., Hoon HAN of Suwon-si KR for samsung electronics co., ltd., Jeewoo NOH of Suwon-si KR for samsung electronics co., ltd., Hyunil LEE of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06F3/16, G05D1/229, G05D107/40, G06F3/01
CPC Code(s): G06F3/165
Abstract: an electronic apparatus is provided. the electronic apparatus includes a display, a sensor, a moving device moving the electronic apparatus, memory storing at least one instruction, and at least one processor that is connected with the display, the sensor, the moving device, and the memory, wherein the at least one instruction, when executed by the at least one processor, causes the electronic apparatus to identify a set state of a do not disturb mode for each of a plurality of users using the electronic apparatus, and based on a predetermined event occurring, perform an operation corresponding to the event to a user who did not set the do not disturb mode.
Inventor(s): Kisung LEE of Suwon-si KR for samsung electronics co., ltd., Dongyoon KIM of Suwon-si KR for samsung electronics co., ltd., Sungjoo KIM of Suwon-si KR for samsung electronics co., ltd., Jongbae KIM of Suwon-si KR for samsung electronics co., ltd., Hoseok WEY of Suwon-si KR for samsung electronics co., ltd., Yoonjae LEE of Suwon-si KR for samsung electronics co., ltd., Donghyun LIM of Suwon-si KR for samsung electronics co., ltd., Yongseok JANG of Suwon-si KR for samsung electronics co., ltd., Woosung CHUNG of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06F3/16, G06F1/3206
CPC Code(s): G06F3/165
Abstract: an electronic apparatus, may include: a communication interface; at least one processor; and a memory configured to store instructions, when executed by the at least one processor, cause the electronic apparatus to: based on a user input for a sound play being received, identify a target device capable of performing the sound play; identify a power state of the target device; based on the power state of the target device being identified as an off state, transmit a first wakeup signal for changing a power state of a speaker in the target device to an on state, to the target device through the communication interface; and based on a first response signal corresponding to the first wakeup signal being received, transmit a first control command for the sound play to the target device through the communication interface.
Inventor(s): Byungwoo MIN of Suwon-si KR for samsung electronics co., ltd., Nawoong HAN of Suwon-si KR for samsung electronics co., ltd., Seonghoon CHOI of Suwon-si KR for samsung electronics co., ltd., Sangheon KIM of Suwon-si KR for samsung electronics co., ltd., Jinwan AN of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06F9/451, G06F1/16, G06F3/04886, G06F9/48
CPC Code(s): G06F9/451
Abstract: an electronic device is provided. the electronic device includes a first housing, a second housing foldably connected with the first housing, a flexible display disposed on the first housing and the second housing, at least one sensor, a memory, and at least one processor operatively connected to the flexible display, the at least one sensor, and the memory, wherein the at least one processor is configured, when instructions stored in the memory are executed, to control the flexible display to display a first execution screen of a first application, based on an angle between the first housing and the second housing, which is identified using the sensor, falling within a predetermined range, identify whether the first application supports changing of an execution screen according to a change in angle, control the flexible display to display a second execution screen of the first application associated with the predetermined range.
Inventor(s): Yujung Song of Suwon-si KR for samsung electronics co., ltd., Sung-Rae Kim of Suwon-si KR for samsung electronics co., ltd., Hye-Ran Kim of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06F11/10
CPC Code(s): G06F11/1044
Abstract: a memory device and a method of operating the memory device are provided. the memory device includes a memory cell array including a plurality of memory cells to store data, an error correction code (ecc) circuit, and an error check and scrub (ecs) circuit. the ecc circuit reads the data from the memory cell array and corrects errors in the data. the ecs circuit performs a scrubbing operation on the memory cell array and transmits a signal for an error address detected based on the scrubbing operation to an external circuit and stores the error address which was transmitted.
Inventor(s): Changyong Oh of Suwon-si KR for samsung electronics co., ltd., Byeonghui Kim of Suwon-si KR for samsung electronics co., ltd., Seongho Roh of Suwon-si KR for samsung electronics co., ltd., Hyeongyu Min of Suwon-si KR for samsung electronics co., ltd., Hyunkyo Oh of Suwon-si KR for samsung electronics co., ltd., Dongchan Lee of Suwon-si KR for samsung electronics co., ltd., Hankyoo Lee of Suwon-si KR for samsung electronics co., ltd., Kibeen Jung of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06F11/34
CPC Code(s): G06F11/3485
Abstract: provided are a method and apparatus for optimizing prefetch performance of a storage device. the method of optimizing prefetch performance of a storage device includes receiving prefetch data from the storage device configured to process a workload based on a parameter, generating prefetch performance data for a plurality of combinations of block size and queue depth, based on the prefetch data, generating index data for evaluating the prefetch performance data, based on the prefetch performance data, updating the parameter to generate an updated parameter based on the index data, and transferring, to the storage device, the updated parameter, wherein the generating of the index data includes generating the index data by taking into account an inversion interval in which prefetch performance decreases with an increase in the block size or the queue depth.
Inventor(s): Jeang-Su HWANG of Suwon-si KR for samsung electronics co., ltd., Seokha SHIN of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06F12/02
CPC Code(s): G06F12/023
Abstract: a storage system may include: a host device including a host memory and configured to: set a size of a host memory buffer (hmb) based on an hmb id indicating the size of the hmb; and allocate a portion of the host memory as the hmb, the portion corresponding to the size of the hmb. the storage system may further include a storage device including a non-volatile memory and configured to: generate the hmb id indicating the size of the hmb, which is based on capacity of the non-volatile memory and communication speed between the host device and the storage device; and transmit the hmb id to the host device.
Inventor(s): Hyunjin Choi of Suwon-si KR for samsung electronics co., ltd., Sunghyun Noh of Suwon-si KR for samsung electronics co., ltd., Hyuk Lee of Suwon-si KR for samsung electronics co., ltd., Kuiyon Mun of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06F12/02, G06F13/16, G06F13/40
CPC Code(s): G06F12/0246
Abstract: a method of operating a storage device including a nonvolatile memory device and a storage controller that is configured to control the nonvolatile memory device, the method comprising: partitioning the nonvolatile memory device into a plurality of domains; determining a scramble function based on a seed value of seed bits that correspond to a first portion of a plurality of address bits of a logical address among a plurality of logical addresses that are provided from a host device; generating a scrambled domain value based on the scramble function and a domain value of domain bits that correspond to a second portion of the plurality of address bits of the logical address among the plurality of logical addresses; and assigning a write operation that corresponds to the logical address to a domain that corresponds to the scrambled domain value among the plurality of domains.
Inventor(s): Zongwang LI of Dublin CA US for samsung electronics co., ltd., Shuyi PEI of Santa Clara CA US for samsung electronics co., ltd., Tong ZHANG of Mountain View CA US for samsung electronics co., ltd., Rekha PITCHUMANI of Oak Hill VA US for samsung electronics co., ltd., Yang Seok KI of Palo Alto CA US for samsung electronics co., ltd.
IPC Code(s): G06F12/0862
CPC Code(s): G06F12/0862
Abstract: a device may include memory media; storage media; a buffer; and at least one circuit configured to perform one or more operations including receiving memory address information; storing the memory address information in the buffer; determining that data may be loaded to the memory media; and loading data to the memory media, from the storage media, corresponding to the memory address information in the buffer. in some aspects, the memory address information is first memory address information; the data is first data; and the at least one circuit is further configured to perform one or more operations including receiving a memory access request including second memory address information; determining to load second data based on the memory access request; and loading the second data to the memory media, from the storage media, based on the second memory address information.
Inventor(s): Jungsik CHOI of Suwon-si KR for samsung electronics co., ltd., Ruth KIM of Suwon-si KR for samsung electronics co., ltd., Seok-Young YOON of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06F12/1036, G06F12/0873
CPC Code(s): G06F12/1036
Abstract: a processor-implemented method includes receiving a mapping instruction to map target data onto a process address space, in response to reception of the mapping instruction, marking an unused node in a tree that manages the process address space as a use node to reuse, and mapping the target data onto a virtual area in the process address space, wherein the tree manages the virtual area onto which the target data is mapped as the use node.
Inventor(s): Jongmin GIM of Pleasanton CA US for samsung electronics co., ltd., Heekwon PARK of San Jose CA US for samsung electronics co., ltd., Jaemin JUNG of San Jose CA US for samsung electronics co., ltd., Changho CHOI of San Jose CA US for samsung electronics co., ltd., Yang Seok KI of Palo Alto CA US for samsung electronics co., ltd.
IPC Code(s): G06F13/40, G06F13/42
CPC Code(s): G06F13/409
Abstract: an apparatus including a switch may include a first interface configured to communicate with at least one memory device, and a second interface configured to communicate with a first physical connector and a second physical connector, where the switch is configured to communicate with a device using the first physical connector using a memory access protocol. the second interface may be configured to communicate with a second device using the second physical connector using the memory access protocol. the apparatus may further include a second switch including a third interface configured to communicate with the at least one memory device, and a fourth interface configured to communicate with a third physical connector and a fourth physical connector, where the second switch may be configured to communicate with the device using the third physical connector using the memory access protocol.
Inventor(s): Sompong Paul Olarig of Pleasanton CA US for samsung electronics co., ltd., Fred Worley of San Jose CA US for samsung electronics co., ltd.
IPC Code(s): G06F13/42, G06F3/06
CPC Code(s): G06F13/4221
Abstract: according to some example embodiments, a system includes: at least one motherboard; at least one baseboard management controller (bmc); a mid-plane; and at least one storage device, wherein the at least one storage device is configured to operate in a first mode or a second mode based on a first input received from the at least one motherboard or the at least one bmc via a plurality of device ports over the mid-plane; and when operating in the second mode, the at least one storage device is configured to operate in a first speed from a plurality of operating speeds based on a second input received from the mid-plane via the plurality of device ports.
Inventor(s): Jiwon JEONG of Suwon-si KR for samsung electronics co., ltd., Ikseon KANG of Suwon-si KR for samsung electronics co., ltd., Hyunseok SHIN of Suwon-si KR for samsung electronics co., ltd., Gunill LEE of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06F21/62, G06T9/20
CPC Code(s): G06F21/6245
Abstract: an electronic device for updating an avatar by reflecting user context information and an operation method thereof are provided. the electronic device includes: a camera; at least one sensor; memory storing at least one instruction; and at least one processor configured to execute the at least one instruction to: obtain user context information to be applied to an avatar from among pieces of user context information obtained via the at least one sensor, the camera, or one or more applications, set a privacy mode by determining whether to publicly disclose each piece of the obtained user context information for each of the one or more applications, update the avatar based on the set privacy mode, and provide an updated avatar via an application among the one or more applications being executed.
Inventor(s): Yunho CHOI of Suwon-si KR for samsung electronics co., ltd., Junhyeok SONG of Suwon-si KR for samsung electronics co., ltd., Junhuck LEE of Suwon-si KR for samsung electronics co., ltd., Jaegyeong CHOI of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06F30/392, G06F115/02
CPC Code(s): G06F30/392
Abstract: a layout design method includes receiving input data defining a semiconductor integrated circuit, performing an arrangement operation and a routing operation based on the input data to obtain a first layout of the semiconductor integrated circuit including plural blocks, setting, on the first layout, a first switch area in which first switches are to be arranged, and arranging the first switches in the first switch area, and arranging second switches in a second switch area that is different from the first switch area to obtain a second layout of the semiconductor integrated circuit.
Inventor(s): Soobok YEO of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06N3/08, G06N3/047
CPC Code(s): G06N3/08
Abstract: a method of approximating a nonlinear function in units of a plurality of segments is provided and includes: detecting an input included in a shortest segment among the plurality of segments; shifting the nonlinear function such that the input is zero in a floating point format; defining the plurality of segments based on at least one bit of the floating point format; and approximating the plurality of segments into a plurality of linear functions, respectively.
Inventor(s): Myeongjae LEE of Suwon-si KR for samsung electronics co., ltd., Joonhee KIM of Pohang-si KR for samsung electronics co., ltd., Soohee HAN of Pohang-si KR for samsung electronics co., ltd., Jungsoo KIM of Suwon-si KR for samsung electronics co., ltd., Jinho KIM of Suwon-si KR for samsung electronics co., ltd., Hangyeol KIM of Pohang-si KR for samsung electronics co., ltd., Hyosik MOON of Pohang-si KR for samsung electronics co., ltd., Huiyong CHUN of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06N20/00, G01R31/367, G01R31/389, G01R31/392
CPC Code(s): G06N20/00
Abstract: a method and apparatus for training a short circuit detection model are disclosed. the method includes generating virtual battery models with different battery parameter sets, based on battery data measured by a real battery in a non-short circuit state, by applying a constraint corresponding to a short circuit state to the virtual battery models, generating a virtual test result of the short circuit state, and training a short circuit detection model configured to detect the short circuit state using the virtual test result.
Inventor(s): Youngchol LEE of Suwon-si KR for samsung electronics co., ltd., Byungseok SOH of Suwon-si KR for samsung electronics co., ltd., Bonseuk GOO of Suwon-si KR for samsung electronics co., ltd., Youngtae KIM of Suwon-si KR for samsung electronics co., ltd., Kisung LEE of Suwon-si KR for samsung electronics co., ltd., Weonhee LEE of Suwon-si KR for samsung electronics co., ltd., Yongseok JANG of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06T3/08, G06T7/11, G06T7/50
CPC Code(s): G06T3/08
Abstract: an electronic device includes: a projector; a camera; one or more processors; and memory storing instructions that, when executed by the one or more processors, cause the electronic device to: control the projector to display a projected image on a screen, wherein the screen includes surfaces; control the camera to obtain a captured image including the surfaces and the projected image; identify, based on the captured image, shapes of the surfaces and areas of the projected image projected onto the surfaces; and correct the projected image, based on the shapes of the surfaces and the areas of the projected image, by transforming the projected image into one from among a three-dimensional image and a flat image.
Inventor(s): Hyunseung LEE of Suwon-si KR for samsung electronics co., ltd., Donghyun KIM of Suwon-si KR for samsung electronics co., ltd., Younghoon JEONG of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06T3/4046, G06T3/4007, G06V10/25
CPC Code(s): G06T3/4046
Abstract: a display device for performing image processing by using a neural network including a plurality of layers, may obtain a plurality of pieces of model information respectively corresponding to pixels included in a first image based on object features respectively corresponding to the pixels; identify the plurality of pieces of model information respectively corresponding to the plurality of layers and the pixels input to the neural network based on information about a time point at which each of the pixels is processed in the neural network; update parameters of the plurality of layers, based on the plurality of pieces of model information; and obtain a second image by processing the first image via the plurality of layers to which the updated parameters are applied; and display the second image.
Inventor(s): Minwoo Jeon of Suwon-si KR for samsung electronics co., ltd., Kanggyune Lee of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06T7/00
CPC Code(s): G06T7/001
Abstract: provided is a mark inspection method of a semiconductor package. the method includes receiving a measured image of a semiconductor package comprising a mark including at least one of a figure and a character string, receiving a standard defect image corresponding to the measured image, the standard defect image includes the mark having a defect comprising at least one of misprinting, cutting, blur, noise, displacement, double printing, reverse printing, bay, and thermochromic phenomena, generating a fake image through a deep learning model using a generative adversarial network (gan) with the measured image and the standard defect image, and comparing the fake image with the measured image.
Inventor(s): Dukhyun KIM of Suwon-si KR for samsung electronics co., ltd., Sangheon KIM of Suwon-si KR for samsung electronics co., ltd., Junsung KIM of Suwon-si KR for samsung electronics co., ltd., Dongil SON of Suwon-si KR for samsung electronics co., ltd., Yoechan SONG of Suwon-si KR for samsung electronics co., ltd., Yeunwook LIM of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06T11/60, G06F3/04845
CPC Code(s): G06T11/60
Abstract: a first electronic device is provided. the first electronic device includes a display, memory storing one or more computer programs, and one or more processors communicatively coupled to the display and the memory, wherein the one or more computer programs include computer-executable instructions that, when executed by the one or more processors individually or collectively, cause the first electronic device to enable the first electronic device to display, through the display, a first background image including a first object, and at least one indicator for executing at least one application on the first background image, identify whether the first object overlaps the at least one indicator, based on identifying that the first object overlaps the at least one indicator, obtain a command to change at least one of a position, a size, or a shape of the first object, obtain a second object in which at least one of the position, the size, or the shape of the first object is changed in consideration of a position of the at least one indicator, based on first information about the first object and second information about the at least one indicator, using an artificial intelligence model stored in the memory, obtain a second background image in which the first object of the first background image is replaced with the second object, and display, through the display, the at least one indicator on the second background image, wherein the at least one indicator does not overlap the second object.
Inventor(s): Junho AN of Suwon-si KR for samsung electronics co., ltd., Hyejin KANG of Suwon-si KR for samsung electronics co., ltd., Jiyoon PARK of Suwon-si KR for samsung electronics co., ltd., Changsub BAE of Suwon-si KR for samsung electronics co., ltd., Sangkyun SEO of Suwon-si KR for samsung electronics co., ltd., Jaeyun SONG of Suwon-si KR for samsung electronics co., ltd., Minsheok CHOI of Suwon-si KR for samsung electronics co., ltd., Gyuhee HAN of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G06T13/00, G06T7/246, G06V40/20, H04N5/272, H04N23/63, H04N23/667
CPC Code(s): G06T13/00
Abstract: an electronic device includes a camera, a display, and a processor. the processor displays a user interface including menu items supporting entry into an edit mode for a body part of an emoji displayed on the display. the processor captures a user face image using the camera, upon a user requesting facial expression edit mode from the interface. the processor generates a facial expression motion file from the user face image. the processor captures a user body image using the camera upon the user requesting body motion edit mode. the processor generates a body motion file from the user body image. the processor adjusts sync for combining the generated facial expression motion file and body motion file. the processor generates a customized emoji sticker on which user facial expression and body movement are reflected by combining the sync-adjusted facial expression motion file and body motion file.
Inventor(s): Keeeun CHOI of Suwon-si KR for samsung electronics co., ltd., Joayoung LEE of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G09G3/00, G06F3/01
CPC Code(s): G09G3/001
Abstract: a method performed by a head mounted display (hmd) device includes: determining a sleep onset preparation start time; and displaying, on a display, a sleep onset preparation screen to which a visual effect is applied, from the sleep onset preparation start time, in a stepwise manner during a sleep onset preparation time interval, where the visual effect that is applied in the stepwise manner comprises a visual effect of switching a virtual screen output through an entire display area of the display to a video see through (vst) screen, where the vst screen displays the virtual screen with a non-virtual screen as a background in the entire display area of the display, where the non-virtual screen is based on an image captured through a front camera, and where the virtual screen is based on content executed by the hmd device.
Inventor(s): Jeeyeon Eom of Suwon-si KR for samsung electronics co., ltd., In-Suk Kim of Suwon-si KR for samsung electronics co., ltd., Yeonjeong Lee of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G09G3/00, G09G3/3283, G09G3/3291
CPC Code(s): G09G3/006
Abstract: an example display driving integrated circuit includes a gamma voltage generator, a source driver, gamma lines, a first transistor, and a second transistor. the gamma voltage generator generates gamma voltages. the source driver generates data signals based on the gamma voltages. the gamma lines connect the gamma voltage generator with the source driver, and transmit the gamma voltages. the first transistor and the second transistor connect to a first end and a second end of a first gamma line of the gamma lines. the first transistor includes a first gate for receiving a first signal. the second transistor includes a second gate for receiving a second signal. the first signal and the second signal are complementary to each other.
Inventor(s): Barry LIU of Zhubei City TW for samsung electronics co., ltd., Skaut Su of Hsinchu City TW for samsung electronics co., ltd., Donken HUANG of Zhubei City TW for samsung electronics co., ltd.
IPC Code(s): G09G3/20, G09G3/3275, G09G3/36
CPC Code(s): G09G3/2007
Abstract: provided is a source driver including: a gamma voltage generator configured to: output a plurality of first gamma voltages during a first time period, and output a second gamma voltage to a plurality of source lines during a second time period different from the first time period, wherein the gamma voltage generator is connected to the plurality of source lines during the second time period; and a plurality of amplifier areas connected to the plurality of source lines, wherein the plurality of amplifier areas are configured to: output a plurality of data signals based on the plurality of first gamma voltages during the first time period, and be disabled during the second time period.
Inventor(s): Young-hun Kim of Yongin-si KR for samsung electronics co., ltd., Si-hong Kim of Hwaseong-si KR for samsung electronics co., ltd., Tae-young Oh of Seoul KR for samsung electronics co., ltd., Kyung-soo Ha of Hwaseong-si KR for samsung electronics co., ltd.
IPC Code(s): G11C7/22, G11C7/10, G11C8/10, G11C8/18, G11C29/02, G11C29/50
CPC Code(s): G11C7/222
Abstract: there are provided a memory device for supporting a command bus training (cbt) mode and a method of operating the same. the memory device is configured to enter a cbt mode or exit from the cbt mode in response to a logic level of a first data signal, which is not included in second data signals, which are in one-to-one correspondence with command/address signals, which are used to output a cbt pattern in the cbt mode. the memory device is further configured to change a reference voltage value in accordance with a second reference voltage setting code received by terminals associated with the second data signals, to terminate the command/address signals or a pair of data clock signals to a resistance value corresponding to an on-die termination (odt) code setting stored in a mode register, and to turn off odt of data signals in the cbt mode.
Inventor(s): Changyoung Lee of Suwon-si KR for samsung electronics co., ltd., Yeongwoo Kang of Suwon-si KR for samsung electronics co., ltd., Yongjun Kim of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G11C11/4091, G11C11/408
CPC Code(s): G11C11/4091
Abstract: memory devices and methods of operating thereof. a memory device may include a plurality of memory cells each including a cell transistor having a back gate that is shared with a cell transistor of an adjacent memory cell through a back gate line, a forward gate that is connected to a corresponding word line, and a cell capacitor that is connected to a first electrode of the cell transistor; a sub-word line driver configured to apply a word line driving voltage to a selected word line; a back gate driver configured to change a back gate voltage applied to the back gate line from a first voltage level to a second voltage level during an active period in which the selected word line is enabled; and a sense amplifier configured to sense data through bit lines connected to second electrodes of the cell transistors of the plurality of memory cells.
Inventor(s): Miji Jang of Suwon-si KR for samsung electronics co., ltd., Kyuseok Lee of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G11C11/4091, G11C11/4074, G11C11/4094
CPC Code(s): G11C11/4091
Abstract: an offset compensated sense amplifier and a memory device including the same are disclosed. a sense amplifier for sensing and amplifying data stored in a memory cell includes a first sense amplifier circuit including first and second pmos transistors connected to a first sensing driving signal line and a second sense amplifier circuit including first and second nmos transistors connected to a second sensing driving signal line. the sense amplifier the sense amplifier is configured to perform an offset compensation operation before sensing and amplifying the data stored in the memory cell, the offset compensation operation including a first offset compensation operation based on a threshold voltage difference between the first nmos transistor and the second nmos transistor, and a second offset compensation operation based on a threshold voltage difference between the first pmos transistor and the second pmos transistor.
Inventor(s): Daehyeon KWON of Suwon-si KR for samsung electronics co., ltd., Donggeon Kim of Suwon-si KR for samsung electronics co., ltd., Bokyeon Won of Suwon-si KR for samsung electronics co., ltd., Selyung Yoon of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G11C11/4097, G11C5/06, G11C11/4091
CPC Code(s): G11C11/4097
Abstract: a memory device includes a first semiconductor layer and a second semiconductor layer disposed with respect to the first semiconductor layer in a third direction. the first semiconductor layer includes a memory cell array, a bitline and a complementary bitline coupled with the memory cell array, a first vertical wire coupled with the bitline, and a second vertical wire coupled with the complementary bitline. the second semiconductor layer includes a peripheral circuit, a bitline sense amplifier, first and second control lines coupled with the bitline sense amplifier, a third vertical wire coupled with the bitline sense amplifier, and a fourth vertical wire coupled with the bitline sense amplifier. the bitline sense amplifier includes at least one first transistor pair that is shared by at least one of the first and second control lines.
Inventor(s): JUNG-MYUNG KANG of SUWON-SI KR for samsung electronics co., ltd., SEONG-OOK JUNG of SEOUL KR for samsung electronics co., ltd., KEONHEE CHO of SEOUL KR for samsung electronics co., ltd., GISEOK KIM of SEOUL KR for samsung electronics co., ltd., SEKEON KIM of SEOUL KR for samsung electronics co., ltd.
IPC Code(s): G11C11/412, G11C11/418, G11C11/419
CPC Code(s): G11C11/412
Abstract: disclosed is a unit cell circuit of a memory cell array, the unit cell circuit having a sub-cell array including a plurality of memory cells each connected to a supply line, and an assist circuit connected to the sub-cell array through the supply line that pre-charges the supply line with a supply voltage during a stand-by mode based on a control signal and blocks the supply line upon initiation of a write operation.
Inventor(s): Kwanghoe Heo of Suwon-si KR for samsung electronics co., ltd., Seongjin Kim of Suwon-si KR for samsung electronics co., ltd., Sang-Wan Nam of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G11C16/08, G11C16/04, G11C16/10, G11C16/26, G11C16/30
CPC Code(s): G11C16/08
Abstract: a memory device includes an array of nonvolatile memory cells and a wordline voltage generator configured to drive: a selected word line within the array with a program voltage, a word line extending immediately adjacent the selected word line with a first voltage during the program operation, and an unselected word line within the array with a second voltage having a magnitude less than a magnitude of the first voltage, during a memory cell program operation. a control block is provided, which drives the wordline voltage generator with a first internal power signal having a first magnitude, in response to a first external supply power signal, drives the wordline voltage generator with a second internal power signal having a second magnitude less than the first magnitude, and selectively redirects power from the first external supply power signal to the second internal power signal, in response to detecting a reduction in current and/or voltage associated with the second external power signal that exceeds a threshold amount.
Inventor(s): Jaeho Ahn of Suwon-si KR for samsung electronics co., ltd., Jiwon Kim of Suwon-si KR for samsung electronics co., ltd., Sungmin Hwang of Suwon-si KR for samsung electronics co., ltd., Joonsung Lim of Suwon-si KR for samsung electronics co., ltd., Sukkang Sung of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G11C16/10, G11C16/26, H01L23/48, H10B41/27, H10B41/35, H10B41/40, H10B43/27, H10B43/35, H10B43/40
CPC Code(s): G11C16/10
Abstract: a semiconductor memory device includes: a semiconductor substrate having a first surface and a second surface opposing each other; a back-side insulating layer below the second surface of the semiconductor substrate; an external input/output conductive pattern below the back-side insulating layer; a circuit device including a gate electrode and a source/drain region, on the first surface of the semiconductor substrate; an internal input/output conductive pattern on the first surface of the semiconductor substrate, the internal input/output conductive pattern having at least a portion disposed on the same level as at least a portion of the gate electrode; a through-electrode structure penetrating through the semiconductor substrate and the back-side insulating layer and electrically connected to the internal input/output conductive pattern and the external input/output conductive pattern; and a memory cell array region disposed on a level higher than the circuit device, on the first surface of the semiconductor substrate.
Inventor(s): Won Hee Cho of Seoul KR for samsung electronics co., ltd., Ji Sung Byun of Suwon-si KR for samsung electronics co., ltd., Dong Eun Shin of Seoul KR for samsung electronics co., ltd.
IPC Code(s): G11C16/10, G06N20/00, G11C16/08, G11C16/34
CPC Code(s): G11C16/102
Abstract: a storage system includes a non-volatile memory (nvm) device, having a memory cell array, and a storage controller. the storage controller receives a write command and data from a host and controls the nvm device to write the data in the memory cell array. additionally, the storage controller determines a memory region of the memory cell array in which the data will be written, clusters a plurality of word lines into a plurality of groups on the basis of feature information of the plurality of word lines, rearranges an access order in units of groups according to the feature information, and accesses the word lines in the rearranged order to write the data in the memory region.
Inventor(s): Buil Nam of Suwon-si KR for samsung electronics co., ltd., Jinsun Yeom of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): G11C29/12, G11C29/40
CPC Code(s): G11C29/12005
Abstract: a nonvolatile memory device includes a memory cell array including a plurality of memory cells connected to a plurality of wordlines and a plurality of bitlines, a row decoder configured to select one of the plurality of wordlines in response to an address, and a wordline leakage current detector configured to determine whether the selected wordline is defective using trim information related to a level of a reference voltage or a gradient of a detect voltage during a test operation, wherein the trim information is stored internally in an electrical die sorting (eds) process.
Inventor(s): Hiroshi SASAKI of Suwon-si JP for samsung electronics co., ltd.
IPC Code(s): H01L21/311, H01L21/02, H01L21/28
CPC Code(s): H01L21/31144
Abstract: a method for manufacturing a semiconductor device is provided and includes: forming a stack structure on a substrate; forming a mask pattern on the stack structure; forming a trench inside the stack structure by performing an etching process, using a process gas, that etches a portion of the stack structure; and forming a protective film pattern on a sidewall and an upper surface of the mask pattern, wherein the process gas includes at least one from among mof, mof, alfand mgf, the protective film pattern includes a material different from a material of each of the mask pattern and the process gas, and a thickness of a portion of the protective film pattern formed on the upper surface of the mask pattern is greater than a thickness of a portion of the protective film pattern formed on the sidewall of the mask pattern.
Inventor(s): Taeheon KIM of Suwon-si KR for samsung electronics co., ltd., Junho LEE of Suwon-si KR for samsung electronics co., ltd., Younghoo KIM of Suwon-si KR for samsung electronics co., ltd., Junho YOON of Suwon-si KR for samsung electronics co., ltd., Jongwon LEE of Suwon-si KR for samsung electronics co., ltd., Jiwoong JUNG of Suwon-si KR for samsung electronics co., ltd., Jihoon JEONG of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L21/67
CPC Code(s): H01L21/67034
Abstract: a substrate processing apparatus includes a process chamber including a processing space, a substrate support configured to support a substrate in the process chamber, a fluid supply tube arranged in a lower portion of the process chamber, and a fluid supply device configured to supply a supercritical fluid to the processing space through the fluid supply tube, wherein the substrate support includes a plate structure, which is arranged in a central region of the substrate support, and on which the substrate is settled, a turbulence reduction body having a ring shape and joined to an outer portion of the plate structure, and a turbulence reduction wing joined to an outer portion of the turbulence reduction body and tilted at a certain angle toward the lower portion of the process chamber.
20250125163. APPARATUS FOR DICING WAFER_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Kyo-Eun LEE of Suwon-si KR for samsung electronics co., ltd., Young Chul KWON of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L21/67, H01L21/687
CPC Code(s): H01L21/67092
Abstract: an apparatus for dicing a wafer includes a stage configured to receive a wafer, and move the wafer in a first direction, and a plurality of laser heads above the stage along the first direction, and as the stage moves the wafer in the first direction, the plurality of laser heads are configured to emit a plurality of laser beams onto the wafer along a plurality of cutting lines, the plurality of cutting lines extending in the first direction and each cutting line spaced apart from other cutting lines in a second direction, the second direction perpendicular to the first direction.
20250125167. MONITORING APPARATUS FOR PACKAGE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Minyan WU of Suzhou CN for samsung electronics co., ltd.
IPC Code(s): H01L21/67, G05B19/048
CPC Code(s): H01L21/67144
Abstract: a monitoring apparatus for a package includes a pressure applying device configured to apply a pressure to the package, a sensor configured to measure the pressure applied to the package by the pressure applying device, and a signal transmitting apparatus electrically coupled to the package and configured to input an input signal to a chip of the package, receive an output signal from the package in real time, and monitor a damage of the chip of the package in real time while the pressure applying device applies the pressure to the package.
20250125174. COOLING STATION_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Haechul KIM of Suwon-si KR for samsung electronics co., ltd., Wonjun CHA of Suwon-si KR for samsung electronics co., ltd., Hyeondong SONG of Suwon-si KR for samsung electronics co., ltd., Hoyeon JANG of Suwon-si KR for samsung electronics co., ltd., Minho KIM of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L21/673, H01L21/67
CPC Code(s): H01L21/6732
Abstract: a cooling station includes: a lower plate; an upper plate spaced apart from the lower plate; a support structure having ends installed on the lower plate and the upper plate, respectively; and a seating member installed on the support structure for a wafer to be seated on the seating member, wherein the seating member has an inclined portion, wherein the wafer is seated on the inclined portion.
Inventor(s): Kyungwook HWANG of Seoul KR for samsung electronics co., ltd., Hyunjoon Kim of Seoul KR for samsung electronics co., ltd., Joonyong Park of Suwon-si KR for samsung electronics co., ltd., Seogwoo Hong of Yongin-si KR for samsung electronics co., ltd., Junsik Hwang of Hwaseong-si KR for samsung electronics co., ltd.
IPC Code(s): H01L21/68, H01L21/683, H01L25/075, H10H20/01
CPC Code(s): H01L21/681
Abstract: a micro-semiconductor chip wet alignment apparatus is provided. the micro-semiconductor chip wet alignment apparatus includes a semiconductor chip wet supply module configured to supply the plurality of micro-semiconductor chips and a liquid onto the transfer substrate so that the plurality of micro-semiconductor chips are flowable on the transfer substrate; and a chip alignment module including an absorber capable of relative movement along a surface of the transfer substrate and configured to absorb the liquid so that the plurality of micro-semiconductor chips are aligned in the plurality of grooves.
Inventor(s): HYUN HO CHOI of Suwon-si KR for samsung electronics co., ltd., JAEHWAN KIM of Suwon-si KR for samsung electronics co., ltd., YONG-HO BAEK of Suwon-si KR for samsung electronics co., ltd., HYEOK-JIN JEONG of Suwon-si KR for samsung electronics co., ltd., HO YUNG CHONG of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L21/687, H01L21/673
CPC Code(s): H01L21/68764
Abstract: disclosed are substrate rotating apparatuses, substrate processing systems, and substrate processing methods. the substrate rotating apparatus comprises vertically arranged stages and a rotary driver that turns the stages upside down. the stage includes a lower support assembly and an upper support assembly adjacent to the lower support assembly. the lower support assembly includes a lower support member having a lower support surface that supports one surface of a substrate. the upper support assembly includes upper support members. the upper support members are spaced apart from each other in a horizontal direction. a substrate placement space is between the upper support members. the upper support member includes an upper support surface that supports another surface of the substrate. the upper support surface is inclined toward the substrate placement space and makes an acute angle with the horizontal direction.
20250125197. SEMICONDUCTOR CHIP_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Junyun Kweon of Suwon-si KR for samsung electronics co., ltd., Wooju Kim of Suwon-si KR for samsung electronics co., ltd., Junho Yoon of Suwon-si KR for samsung electronics co., ltd., Dayoung Cho of Suwon-si KR for samsung electronics co., ltd., Jinwook Hong of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L21/78, B23K26/38, B23K101/40, H01L21/02, H01L21/304, H01L21/683
CPC Code(s): H01L21/78
Abstract: a semiconductor chip includes a base substrate including a first surface, a second surface opposite to the first surface, and a sidewall extending between the first surface and the second surface, and a device layer on the first surface of the base substrate, wherein the base substrate includes a stress relief region within a first depth from the second surface and a second depth from the sidewall, and at least a portion of the sidewall of the base substrate is recessed inward from the sidewall of the device layer.
Inventor(s): Jinwoo Park of Suwon-si KR for samsung electronics co., ltd., Kiseok Kim of Suwon-si KR for samsung electronics co., ltd., Jinyoung Kim of Suwon-si KR for samsung electronics co., ltd., Jihye Shim of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L23/29, H01L23/00, H01L23/31, H01L23/48
CPC Code(s): H01L23/295
Abstract: a semiconductor package includes a first semiconductor chip including first pads, a second semiconductor chip including second pads in contact with the first pads, and through-electrodes electrically connected to the second pads and extending to a rear surface opposite to the front surface, a dielectric layer covering at least portions of the respective first and second semiconductor chips and having an inner surface facing the first and second semiconductor chips and an outer surface opposite the inner surface, and bump structures on a portion of the outer surface of the dielectric layer and electrically connected to the through-electrodes. the dielectric layer includes inorganic particles, and polymer chains bonded to at least one sides of the respective inorganic particles and connected toward the inner surface and the outer surface via the inorganic particles.
Inventor(s): Cheol KIM of Suwon-si KR for samsung electronics co., ltd., Hyoeun KIM of Suwon-si KR for samsung electronics co., ltd., Huiyeong JANG of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L23/373, H01L23/00, H01L23/31, H01L23/48, H01L23/498, H01L25/065, H01L29/04, H01L29/36
CPC Code(s): H01L23/3738
Abstract: disclosed are semiconductor packages and their fabrication methods. the semiconductor package comprises a first semiconductor chip, a second semiconductor chip on a top surface of the first semiconductor chip and having a width less than that of the first semiconductor chip, and a molding layer on the first semiconductor chip and surrounding the second semiconductor chip. the first semiconductor chip includes a first semiconductor substrate and a first circuit layer on a top surface of the first semiconductor substrate. the first semiconductor substrate includes a first part adjacent to the top surface of the first semiconductor substrate and a second part adjacent to a bottom surface of the first semiconductor substrate. the first and second parts include the same semiconductor material. the first part has a single crystalline structure. the second part may have a polycrystalline structure.
Inventor(s): Sungchan KANG of Suwon-si KR for samsung electronics co., ltd., Dongkyun KIM of Suwon-si KR for samsung electronics co., ltd., Daehyuk SON of Suwon-si KR for samsung electronics co., ltd., Hotaik LEE of Suwon-si KR for samsung electronics co., ltd., Seogwoo HONG of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L23/473, H01L23/367
CPC Code(s): H01L23/473
Abstract: a semiconductor device includes: a semiconductor chip including a semiconductor integrated circuit; a heat transfer member covering an upper surface of the semiconductor chip; and a plurality of microstructures on an upper surface of the heat transfer member and configured to generate a capillary force to cause a flow of a coolant, wherein a first capillary channel is provided between adjacent microstructures of the plurality of microstructures, and at least one of the plurality of microstructures may include a hollow microstructure in which a second capillary channel is provided.
Inventor(s): Yeonjin LEE of Suwon-si KR for samsung electronics co., ltd., Jongmin LEE of Suwon-si KR for samsung electronics co., ltd., Jeonil LEE of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L23/48, H01L21/768, H01L23/00, H01L25/065, H10B99/00
CPC Code(s): H01L23/481
Abstract: a semiconductor device according to some example embodiments includes a substrate, an insulating structure covering the substrate, a transistor between the substrate and the insulating structure, a via insulating layer extending through the insulating structure and the substrate, a plurality of via structures extending through the via insulating layer, a plurality of conductive structures respectively connected to the plurality of via structures, and a plurality of bumps respectively connected to the conductive structures.
Inventor(s): Ryuichiro TOMINAGA of Yokohama JP for samsung electronics co., ltd., Mitsuhiro TOMIKAWA of Yokohama JP for samsung electronics co., ltd., Takashi KARIYA of Yokohama JP for samsung electronics co., ltd., Toshiki FURUTANI of Yokohama JP for samsung electronics co., ltd.
IPC Code(s): H01L23/49, H01L23/00, H01L25/10
CPC Code(s): H01L23/49
Abstract: an electronic component embedded module may include a hole diameter defining layer, an electronic component, and an insulation layer. the hole diameter defining layer may include an inner wall, an outer wall, a front surface intersecting with the inner wall and the outer wall, and a rear surface. the electronic component may include a first terminal surface facing the rear surface of the hole diameter defining layer, and a first terminal electrode on the first terminal surface. the insulation layer is between the first terminal surface and the rear surface, covers the outer wall, and includes a step with respect to the front surface around the front surface. a connection hole may extend from the inner wall of the hole diameter defining layer to the first terminal electrode through the insulation layer.
20250125229. SEMICONDUCTOR DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Taejun Jeon of Suwon-si KR for samsung electronics co., ltd., Seunghwan Kim of Suwon-si KR for samsung electronics co., ltd., Junwoo Park of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L23/495, H01L23/00, H01L23/29, H01L23/373, H01L23/498, H01L25/065
CPC Code(s): H01L23/49568
Abstract: provided is a semiconductor device including a tower-shaped or bridge-shaped connection structure and a metal plate. the semiconductor device includes: a package substrate; a semiconductor chip stacked on the package substrate along a vertical direction; a connection structure arranged on the package substrate and formed to surround a sidewall of the semiconductor chip; a metal plate attached to an upper surface of the connection structure; and a sealant formed to cover an upper surface of the semiconductor chip and contact with a side surface of the connection structure.
Inventor(s): Hansae Lim of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L23/498, H01L23/00, H01L23/31
CPC Code(s): H01L23/49838
Abstract: a semiconductor package includes a wiring substrate including a wiring pattern, a solder resist layer disposed on the wiring pattern and including an opening region, and a first penetrating contact disposed in the opening region of the solder resist layer. the semiconductor chip disposed in the opening region and connected to the wiring substrate. the molding portion includes a first portion covering the semiconductor chip and a second portion disposed below the semiconductor chip. the second portion includes a penetrating molding portion disposed in the first penetrating contact.
Inventor(s): Jaeean Lee of Suwon-si KR for samsung electronics co., ltd., Dongwon Kang of Suwon-si KR for samsung electronics co., ltd., Jieun Park of Suwon-si KR for samsung electronics co., ltd., Changyeon Song of Suwon-si KR for samsung electronics co., ltd., Sunguk Lee of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L23/498, H01L21/48, H01L21/683, H01L23/00, H01L23/31, H01L25/10
CPC Code(s): H01L23/49838
Abstract: an ic package includes a lower redistribution structure, a connection structure (with cavity) on the lower redistribution structure, a semiconductor chip in the cavity, a molding layer filling the cavity, covering the connection structure and the semiconductor chip, and having an upper through hole therein. an upper redistribution structure is provided that includes: an upper insulating layer on the molding layer, a first protrusion inside the upper through hole, and an upper redistribution pattern, which includes a first upper via pattern, inside the first protrusion. the upper through hole of the molding layer is located above the via structure of the connection structure, the first upper via pattern is electrically connected to the via structure of the connection structure, and a portion of the first upper line pattern of the upper redistribution structure is buried in the upper insulating layer.
Inventor(s): Joongsuk OH of Watervliet NY US for samsung electronics co., ltd., Jaemyung CHOI of Niskayuna NY US for samsung electronics co., ltd., Kang-ill SEO of Springfield VA US for samsung electronics co., ltd.
IPC Code(s): H01L23/522, H01L23/528, H01L23/532
CPC Code(s): H01L23/5226
Abstract: provided is a semiconductor device which includes: a transistor structure; a plurality of 1metal lines above the transistor structure; and a plurality of 1vias formed on selected 1metal lines, respectively, among the plurality of 1metal lines; a 2via formed on a 1via among the plurality of 1vias; and a 2metal line on the 2via, wherein the 1metal lines are arranged in a 1direction and extended in a 2direction which intersects the 1direction, and the 2metal line is extended in the 1direction, and wherein the plurality of 1vias comprise at least one dummy via which is not connected to any metal line thereabove other than an underlying 1metal line among the selected 1metal lines.
20250125256. SEMICONDUCTOR PACKAGE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Jae Sup Lee of Suwon-si KR for samsung electronics co., ltd., Sol Hee In of Suwon-si KR for samsung electronics co., ltd., Do Hyung Kim of Suwon-si KR for samsung electronics co., ltd., Byung Wook Jung of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L23/522, H01L23/00, H01L23/498, H01L23/64, H01L25/16
CPC Code(s): H01L23/5227
Abstract: a semiconductor package includes a first substrate that includes a first side and a second side opposite to each other; a semiconductor chip on the second side of the first substrate, and includes a third side and a fourth side opposite to each other; a second substrate between the second side of the first substrate and the third side of the semiconductor chip, and includes a fifth side and a sixth side opposite to each other; a first connecting structure electrically connecting the first substrate and the second substrate, between the first substrate and the second substrate; a second connecting structure electrically connecting the second substrate and the semiconductor chip, between the second substrate and the semiconductor chip; and a coil structure that includes a plurality of conductive layers, and is placed in at least one of the first substrate, the second substrate, and the semiconductor chip.
Inventor(s): Yeohoon YOON of Yongin-si KR for samsung electronics co., ltd., Ilho KIM of Yongin-si KR for samsung electronics co., ltd.
IPC Code(s): H01L23/538, H01L23/00, H01L23/31
CPC Code(s): H01L23/5383
Abstract: a semiconductor package may include a first semiconductor chip, a second semiconductor chip spaced apart from the first semiconductor chip, an adhesive layer including an interposition portion and a side portion, and a molding layer. the molding layer may surround the first semiconductor chip, the second semiconductor chip, and the adhesive layer. the interposition portion may be between the first and second semiconductor chips. the side portion may contact a side surface of the first semiconductor chip and a side surface of the second semiconductor chip. a top surface of the side portion is curved, and an outer side surface of the side portion is flat.
Inventor(s): Taejun KIM of Suwon-si KR for samsung electronics co., ltd., Geunwoo KIM of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L23/552, H01L21/285, H01L23/00, H01L23/498, H01L25/065, H01L25/10, H01L25/18, H10B80/00
CPC Code(s): H01L23/552
Abstract: a semiconductor package may include: a wiring structure having a structure in which at least one insulating layer and at least one wiring layer are alternately stacked; a semiconductor chip disposed to vertically overlap the wiring structure; and a conductive shielding layer accommodating the semiconductor chip, and covering a portion of a side surface of the wiring structure to be connected to a ground of the at least one wiring layer, wherein the other portion of the side surface of the wiring structure may not be covered by the conductive shielding layer.
Inventor(s): HYUNSU HWANG of Suwon-si KR for samsung electronics co., ltd., JUMYONG PARK of Suwon-si KR for samsung electronics co., ltd., DONGJOON OH of Suwon-si KR for samsung electronics co., ltd., SANGHOO CHO of Suwon-si KR for samsung electronics co., ltd., JEONGGI JIN of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L23/00, H01L21/48, H01L23/498, H01L23/522, H01L23/532
CPC Code(s): H01L24/05
Abstract: a semiconductor device includes a structure including a dielectric layer and a wire pattern embedded in the dielectric layer. the dielectric layer includes first regions and a second region around the first regions. the second region has an upper surface positioned at a lower level than upper surfaces of the first regions. a barrier layer is on the structure. the barrier layer is disposed on each first region among the first regions and is connected to the wire pattern. a seed metal layer is on the barrier layer. a conductive pad is on the seed metal layer.
Inventor(s): Jing Cheng LIN of Suwon-si KR for samsung electronics co., ltd., Youngkun JEE of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L23/00, H01L21/48, H01L23/367, H01L23/498, H01L25/18, H10B80/00
CPC Code(s): H01L24/08
Abstract: a semiconductor package includes a substrate including: a substrate comprising a through-hole; a first semiconductor chip in the through-hole; an adhesive layer on a side surface of the first semiconductor chip in the through-hole; a first redistribution structure on an upper surface of the substrate and bonded and connected to the substrate; a second redistribution structure on a lower surface of the substrate and bonded and connected to the substrate; a second semiconductor chip on the first redistribution structure; and a through-via spaced apart from the first semiconductor chip in a horizontal direction and passing through the substrate in a vertical direction.
20250125299. SEMICONDUCTOR PACKAGE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Do Hoon Kim of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L23/00, H01L23/31, H01L23/538, H01L25/065, H10B80/00
CPC Code(s): H01L24/32
Abstract: disclosed is a semiconductor package including: a substrate including first and second surfaces opposite to each other, wherein the substrate extends in first and second directions intersecting each other; a first semiconductor chip on the first surface of the substrate; a second semiconductor chip on the first surface of the substrate and spaced apart from the first semiconductor chip in the first direction; and a dam structure at least partially surrounding the first semiconductor chip, wherein the dam structure includes first and second dam structures on the first surface of the substrate and spaced apart from each other in the first direction such that the first semiconductor chip resides therebetween, wherein the first and second dam structures have different heights relative to the first surface of the substrate.
Inventor(s): Jing Cheng LIN of Suwon-si KR for samsung electronics co., ltd., Youngkun Jee of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L25/16, H01L23/00, H01L23/31, H10B80/00
CPC Code(s): H01L24/73
Abstract: a semiconductor package includes a first semiconductor chip including a plurality of upper pads, a non-conductive support layer on a top surface of the first semiconductor chip and including a plurality of openings, a second semiconductor chip on the first semiconductor chip and including a plurality of lower pads, a plurality of chip connecting terminals extending between the plurality of upper pads and the plurality of lower pads, and an insulation adhesive layer between the first semiconductor chip and the second semiconductor chip and at least partially covering the plurality of chip connecting terminals and the non-conductive support layer. a top surface of the non-conductive support layer is disposed closer to a bottom surface of the second semiconductor chip than top surfaces of the plurality of upper pads are disposed to the bottom surface of the second semiconductor chip.
Inventor(s): JIN YANG of San Jose CA US for samsung electronics co., ltd., WOOPOUNG KIM of San Jose CA US for samsung electronics co., ltd.
IPC Code(s): H01L25/065, H01L23/00, H01L23/538, H01L25/18, H10B10/00, H10B12/00
CPC Code(s): H01L25/0657
Abstract: a semiconductor package may include a first redistribution line structure; a die on the first redistribution line structure; a first memory device on a first surface of the die; a second redistribution line structure on a second surface of the die opposite from the first surface; a second memory device on the second redistribution line structure; and at least one semiconductor chip on the second redistribution line structure and electrically connected to the first memory device and to the second memory device. the first memory device may be a static ram (sram), and the second memory device may be a dynamic ram (dram).
Inventor(s): Junghoon Kang of Suwon-si KR for samsung electronics co., ltd., Daegon Kim of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L25/065, G02B6/42, G02B6/43, H01L23/00, H01L23/13, H01L23/48, H01L23/498, H01L23/538, H01L27/144
CPC Code(s): H01L25/0657
Abstract: a semiconductor package includes a package substrate, an electronic integrated circuit chip mounted on the package substrate, a first photonic integrated circuit chip mounted on the electronic integrated circuit chip, the first photonic integrated circuit chip including a first groove recessed from a top surface and a side surface of the first photonic integrated circuit chip, and a second photonic integrated circuit chip mounted on the first photonic integrated circuit chip, the second photonic integrated circuit chip including a second groove recessed from a top surface and a side surface of the second photonic integrated circuit chip, wherein the second photonic integrated circuit chip is offset-stacked on the first photonic integrated circuit chip, wherein at least a portion of a bottom surface of the first groove of the first photonic integrated circuit chip is exposed to the outside.
Inventor(s): Daeho LEE of Hwaseong-si KR for samsung electronics co., ltd., Kilsoo KIM of Hwaseong-si KR for samsung electronics co., ltd.
IPC Code(s): H01L25/10, H01L23/538
CPC Code(s): H01L25/105
Abstract: a semiconductor package includes a lower redistribution layer having a plurality of lower ball pads forming a plurality of lower ball pad groups, a semiconductor chip on the lower redistribution layer, an expanded layer surrounding the semiconductor chip on the lower redistribution layer, and an upper redistribution layer on the semiconductor chip and the expanded layer and having a plurality of upper ball pads forming a plurality of upper ball pad groups. the number of the plurality of upper ball pad groups may be the same as the number of the of the plurality lower ball pad groups. each of the upper ball pads in one of the plurality of upper ball pad groups, from among the plurality of upper ball pads, may be a dummy ball pad.
20250125321. SEMICONDUCTOR PACKAGE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Junghoon Kang of Suwon-si KR for samsung electronics co., ltd., Daegon Kim of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L25/16, G02B6/42, G02B6/43, H01L23/00, H01L23/13, H01L23/31, H01L23/48, H01L23/49, H01L23/538, H01L27/144
CPC Code(s): H01L25/167
Abstract: an example semiconductor package includes a package substrate, an electronic integrated circuit (eic) package mounted on the package substrate, and a plurality of photonic integrated circuit (pic) chips stacked on the eic package. each pic chip of the plurality of pic chips includes an upper groove recessed inwards from an upper surface of the pic chip and being open toward a first side surface of the pic chip. the eic package includes a lower redistribution layer on the package substrate, an eic chip mounted on the lower redistribution layer, a molding layer surrounding the eic chip, a through via passing through the molding layer in a vertical direction and electrically connected with the lower redistribution layer, and an upper redistribution layer on the through via.
20250125457. LITHIUM BATTERY_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Jirae Kim of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01M50/136, H01M10/052, H01M50/119
CPC Code(s): H01M50/136
Abstract: a lithium battery including a unit cell stack including a plurality of unit cells stacked in a thickness direction thereof; and a battery case for accommodating the unit cell stack, wherein the battery case includes an upper surface portion adjacent to an upper end surface of the unit cell stack, a lower surface portion adjacent to a lower end surface of the unit cell stack, and a side portion connecting the upper surface portion and the lower surface portion, and the side portion includes a corrugated portion disposed in the thickness direction of the unit cell stack.
Inventor(s): Youngjoon LIM of Suwon-si KR for samsung electronics co., ltd., Hyeonuk KANG of Suwon-si KR for samsung electronics co., ltd., Hosaeng KIM of Suwon-si KR for samsung electronics co., ltd., Sangha LEE of Suwon-si KR for samsung electronics co., ltd., Jaehoo JO of Suwon-si KR for samsung electronics co., ltd., Soonho HWANG of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01Q1/22, H01Q19/10
CPC Code(s): H01Q1/22
Abstract: according to various embodiments, an electronic device may include at least one housing including a rear cover, a conductive structure disposed in an inner space of the at least one housing, and a first antenna structure in the inner space, the first antenna structure including a substrate including a first substrate surface and a second substrate surface facing in an opposite direction to the first substrate surface; and a plurality of antenna elements disposed on the substrate. the plurality of antenna elements are configured to transmit signals in a direction towards the conductive structure. the first antenna structure may be disposed such that the first substrate surface faces in a first direction so as to face the conductive structure. the conductive structure is configured to change direction of the signals transmitted by the plurality of antenna elements to form a beam pattern through the rear cover.
20250125538. ELECTRONIC DEVICE INCLUDING ANTENNA_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Jaehoon JO of Suwon-si KR for samsung electronics co., ltd., Hojung NAM of Suwon-si KR for samsung electronics co., ltd., Sungkoo PARK of Suwon-si KR for samsung electronics co., ltd., Kyungjae LEE of Suwon-si KR for samsung electronics co., ltd., Kookjoo LEE of Suwon-si KR for samsung electronics co., ltd., Soonho HWANG of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01Q21/06, H01Q1/24, H01Q1/42, H05K1/14
CPC Code(s): H01Q21/064
Abstract: a foldable electronic device includes a first housing including a first rear cover and a first bracket, a second housing including a second rear cover and a second bracket, a hinge module rotatably interconnecting the first housing and the second housing, a hinge cover coupled to the hinge module, and a wireless communication circuit. a first slot is formed in a conductive area of the first bracket. in a direction orthogonal to the first rear cover, at least a portion of the first slot overlaps the hinge cover in an unfolded state of the foldable electronic device. the wireless communication circuit is configured to transmit, receive, or transmit and receive a signal of a predetermined frequency band through the first slot formed in the conductive area of the first bracket.
Inventor(s): Doojin Jang of Suwon-si KR for samsung electronics co., ltd., Hyunsik Kim of Daejeon-si KR for samsung electronics co., ltd., Junhyeok Yang of Suwon-si KR for samsung electronics co., ltd., Sungmin Yoo of Suwon-si KR for samsung electronics co., ltd., Honghyun Bae of Daejeon-si KR for samsung electronics co., ltd.
IPC Code(s): H02M3/158, H02M1/00
CPC Code(s): H02M3/158
Abstract: provided is a hybrid buck converter including a first pmos transistor and a second pmos transistor electrically connecting a power supply voltage node with a first switching node, a first nmos transistor and a second nmos transistor electrically connecting a ground node with the first switching node, an inductor electrically connecting the first switching node with a second switching node, a third nmos transistor electrically connecting the second switching node with a first output node, a third pmos transistor electrically connecting the second switching node with a second output node, a shunt regulator that is driven based on a second output voltage of the second output node, a first pwm controller adjusting, based on a pulse width control of first pmos transistor and first nmos transistor, a magnitude of an inductor current, and a second pwm controller adjusting, based on a pulse width control of first pmos transistor and first nmos transistor, a magnitude of the second output voltage.
20250125812. SEMICONDUCTOR DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Jejoong Woo of Suwon-si KR for samsung electronics co., ltd., Jaewoo Park of Suwon-si KR for samsung electronics co., ltd., Seungyeob Baek of Suwon-si KR for samsung electronics co., ltd., Myoungbo Kwak of Suwon-si KR for samsung electronics co., ltd., Junghwan Choi of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H03M1/00, H03M1/12
CPC Code(s): H03M1/002
Abstract: an example semiconductor device includes a plurality of analog-to-digital converters (adcs) configured to receive an analog signal from at least one amplifier connected to a pad, and a logic circuit configured to control the plurality of adcs. the logic circuit is configured to activate first active adcs, among the plurality of adcs, in a first operating mode, and to activate second active adcs, among the plurality of adcs, in a second operating mode different from the first operating mode. a first latency required for the first active adcs to receive the analog signal and to output a first digital signal is longer than a second latency required for the second active adcs to receive the analog signal and to output a second digital signal.
20250125815. HYBRID DAC-BASED DRIVER STRUCTURE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Minsoo CHOI of Santa Clara CA US for samsung electronics co., ltd., Hiep PHAM of Saratoga CA US for samsung electronics co., ltd., Chih-Wei YAO of Saratoga CA US for samsung electronics co., ltd., Hyojun KIM of Milpitas CA US for samsung electronics co., ltd.
IPC Code(s): H03M1/68
CPC Code(s): H03M1/68
Abstract: a hybrid digital-to-analog converter (dac) driver is provided. the hybrid dac driver includes an upper dac stage configured to receive an upper set of bits of a digital signal, the upper dac stage comprising an upper set of dac units, with a first dac unit in the upper set of dac units having a different weight than a second dac unit in the upper set of dac units; a lower dac stage configured to receive a lower set of bits of the digital signal, the lower dac stage comprising a lower set of dac units formed in an r-2r resistor ladder network; and an output stage for outputting an analog signal from the upper dac stage and the lower dac stage.
Inventor(s): SUMIN KIM of SUWON-SI KR for samsung electronics co., ltd., HONGMIN CHOI of SUWON-SI KR for samsung electronics co., ltd., MIN-SIK KIM of SUWON-SI KR for samsung electronics co., ltd., CHANGHYUN BAEK of SUWON-SI KR for samsung electronics co., ltd., HYUNG SUN LIM of SUWON-SI KR for samsung electronics co., ltd., JOONHOI HUR of SUWON-SI KR for samsung electronics co., ltd.
IPC Code(s): H04B1/04, H04L27/36
CPC Code(s): H04B1/0475
Abstract: a radio-frequency (rf) circuit including: a multi-tone generation circuit configured to generate a multi-tone signal including a plurality of tones; a predistortion circuit configured to predistort the multi-tone signal or a modulation signal and output a predistortion signal; a power amplifier configured to amplify the predistortion signal and output an output signal; and a predistortion modeling circuit configured to model a predistortion model corresponding to the predistortion circuit based on the predistortion signal corresponding to the multi-tone signal and the output signal.
Inventor(s): Jaehwan LEE of Suwon-si KR for samsung electronics co., ltd., Jinwoo OH of Suwon-si KR for samsung electronics co., ltd., Hongsik YOON of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H04B17/309
CPC Code(s): H04B17/346
Abstract: an operating method of a wireless communication device operating in a narrowband internet of things (iot) communication standalone mode includes calculating a noise covariance of a target subframe based on signals received through unused resource elements in the target subframe, the target subframe being among a plurality of subframes included in a downlink signal, and the downlink signal being received from an external device, and estimating a signal-to-noise ratio (snr) of the target subframe based on the noise covariance.
20250125932. SIGNALING FOR PULSE SHAPING_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Soheil Rostami of Carrollton TX US for samsung electronics co., ltd., Joonyoung Cho of Portland OR US for samsung electronics co., ltd., Ravindranath Kanamangala of Murphy TX US for samsung electronics co., ltd.
IPC Code(s): H04L5/00, H04L25/03, H04W72/51
CPC Code(s): H04L5/0053
Abstract: methods and apparatuses for signaling pulse shaping in a wireless communication system. a method of bs includes determining a spectral extension index (seindex) and a frequency domain spectral shaping type index (fdsstypeindex) for at least one transmission time interval (tti) and transmitting, to a ue, the seindex and the fdsstypeindex. the method further includes receiving, from the ue, uplink (ul) data based on a spectral extension (se) ratio associated with the seindex and frequency domain spectral shaping (fdss) values. the fdss values are associated with the fdsstypeindex.
Inventor(s): Mun Gyu BAE of Hwaseong-si KR for samsung electronics co., ltd., Ji Soo KIM of Seongnam-si KR for samsung electronics co., ltd., Hyun Soo KWON of Hwaseong-si KR for samsung electronics co., ltd., Youn Sung CHU of Yongin-si KR for samsung electronics co., ltd.
IPC Code(s): H04L9/08, G06F21/78, H04L9/32
CPC Code(s): H04L9/0825
Abstract: a storage device having improved security reliability includes a non-volatile memory, and a storage controller configured to control an operation of the non-volatile memory, generate a key material, receive a key identification (id) from a firmware, determine whether a salt value matching the key id is stored in the non-volatile memory, generate a private key using the salt value stored in the non-volatile memory and the key material in response to determining that the salt value matching the key id is stored in the non-volatile memory, and, in response to determining that the sale value matching the key id is not stored in the non-volatile memory, receive a salt value from the firmware and generate the private key using the salt value from the firmware and the key material, and store the salt value used for generating the private key in the non-volatile memory.
Inventor(s): Minsoo CHOI of Santa Clara CA US for samsung electronics co., ltd., Hiep PHAM of Saratoga CA US for samsung electronics co., ltd., Chih-Wei YAO of Saratoga CA US for samsung electronics co., ltd., Hyojun KIM of Milpitas CA US for samsung electronics co., ltd.
IPC Code(s): H04L25/02
CPC Code(s): H04L25/0272
Abstract: a wireline transceiver system includes a predriver configured to generate a signal; a source-series termination (sst) driver configured to receive the generated signal; and a replica driver configured to continuously generate bias voltages in real time to modulate current of a push-pull current source of the sst driver based on a voltage of the received signal across a process, voltage, and temperature (pvt) range.
Inventor(s): Seijoon SHIM of Suwon-si KR for samsung electronics co., ltd., Byungjoon PARK of Suwon-si KR for samsung electronics co., ltd., Hyoungjin LIM of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H04L27/26, H04W72/20
CPC Code(s): H04L27/26025
Abstract: according to various embodiments, a method performed by a radio unit (ru) may comprise: receiving, from a distributed unit (du), a control plane (c-plane) message including frame structure information for indicating frequency offset information and a subcarrier spacing (scs). the method may comprise identifying a frequency offset factor from among a plurality of frequency offset factors. the method may comprise obtaining a frequency offset value corresponding to a product of the frequency offset information, the scs, and the frequency offset factor. the method may comprise transmitting a downlink signal on the basis of the frequency offset value. the plurality of frequency offset factors may include 0.5 and 0.25.
Inventor(s): Nuwan Suresh Ferdinand of Stittsville CA for samsung electronics co., ltd.
IPC Code(s): H04L27/26, H04L25/03
CPC Code(s): H04L27/263
Abstract: in one embodiment, a method includes accessing a modulated symbol sequence comprising multiple symbols, generating interpolated symbols to be added between any two adjacent symbols based on an unequal phase change method, generating an interpolated symbol sequence based on adding the generated interpolated symbols for any two adjacent symbols into the two adjacent symbols, and transmitting a waveform to a wireless endpoint device, wherein the waveform is generated based on the interpolated symbol sequence.
Inventor(s): Soheil Rostami of Carrollton TX US for samsung electronics co., ltd., Fabrizio Carpi of Brooklyn NY US for samsung electronics co., ltd., Joonyoung Cho of Portland OR US for samsung electronics co., ltd.
IPC Code(s): H04L27/26
CPC Code(s): H04L27/2636
Abstract: methods and apparatuses for papr reduction based on a pulse shaping operation in a wireless communication system. a method of operating a ue includes: converting, using a dft, a modulated block of data symbols to a first symbol block in a frequency domain; extending, based on a spectral extension ratio associated with extended subcarriers (n), the first symbol block to a second symbol block with a length that is identified based on a number of scheduled subcarriers (n), wherein the second symbol block is symmetrically extended dft symbol block; generating, using an fdss filter with a number of tap values (n), third symbol block based on the second symbol block that is symmetrically extended dft symbol block; mapping the generated third symbol block to the n; generating, based on the mapped third symbol block, ofdm symbols in a time domain using an ifft; and transmitting, to a bs, signals including the ofdm symbols.
Inventor(s): Srihari Das SUNKADA GOPINATH of Bangalore IN for samsung electronics co., ltd.
IPC Code(s): H04L47/193, H04L47/28
CPC Code(s): H04L47/193
Abstract: a method for managing transmission control protocol acknowledgement (tcp ack) packet processing by a receiver device, including: receiving a plurality of data packets from a transmitter device at a packet data convergence protocol (pdcp) layer of the receiver device, each of the plurality of data packets including a pdcp header; determining whether a reorder timer of the pdcp layer is running or started based on pdcp sequence numbers of the received plurality of data packets included in the pdcp header; identifying, based on a determination that the reorder timer of the pdcp layer is running or started, one or more tcp ack packets among the received plurality of data packets; and transferring, one or more identified tcp ack packets to an upper layer without waiting for an expiry of the reorder timer of the pdcp layer.
Inventor(s): Vipul GUPTA of Noida IN for samsung electronics co., ltd.
IPC Code(s): H04L9/40, G06T19/00, G06T19/20, G06V20/20
CPC Code(s): H04L63/08
Abstract: the present disclosure relates to a method and a system for authenticating a virtual representation of a user in a virtual environment. the method may include receiving an authentication request to authenticate the virtual representation of the first user in the virtual environment; based on the virtual representation of the first user being an authenticated virtual representation of the first user, extracting one or more authentication parameters embedded within the virtual representation of the first user; and displaying, in the virtual environment, authentication information of the virtual representation of the first user based on the one or more authentication parameters.
Inventor(s): Donghyun JE of Gyeonggi-do KR for samsung electronics co., ltd., Dongmyung KIM of Gyeonggi-do KR for samsung electronics co., ltd., Sunghwan KIM of Gyeonggi-do KR for samsung electronics co., ltd., Younggyoun MOON of Gyeonggi-do KR for samsung electronics co., ltd.
IPC Code(s): H04L69/22, H04L45/00
CPC Code(s): H04L69/22
Abstract: disclosed is a fifth generation (5g) communication system or a sixth generation (6g) communication system for supporting higher data rates beyond a fourth generation (4g) communication system such as long term evolution (lte). a method performed by a first device performing packet processing in a mobile communication system includes receiving, from a second device performing packet processing, a packet processing allocation request message requesting packet processing, receiving a packet, determining a packet processing method of the received packet based on the packet processing allocation request message, and performing packet processing of the received packet based on the determined packet processing method.
Inventor(s): Minsu RHEE of Suwon-si KR for samsung electronics co., ltd., Gun LIM of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H04M1/02
CPC Code(s): H04M1/0222
Abstract: an electronic device is provided. the electronic device includes a first housing including a first surface and a second surface opposite to the first surface, a second housing including a third surface and a fourth surface opposite to the third surface, a third housing including a fifth surface and a sixth surface opposite to the fifth surface, a first hinge structure rotatably coupling the first housing and the second housing, a first actuator coupled with the first hinge structure, a second hinge structure rotatably coupling the first housing and the third housing, a second actuator coupled with the second hinge structure, a flexible display disposed on the first surface, the third surface and the fifth surface, including a first area corresponding to the first surface, a second area corresponding to the third surface, and a third area corresponding to the third surface, a plurality of sensors, memory storing one or more computer programs and one or more processors communicatively coupled to the flexible display, and the memory, wherein the one or more computer programs include computer-executable instructions that, when executed by the one or more processors individually or collectively, cause the electronic device to receive a user input indicating a change from a folded state including the flexible display at least partially covered by the second housing and the third housing, to an unfolded state including the flexible display exposed to an outside, in response to the user input, identify a reference posture corresponding to a posture of the electronic device identified through the plurality of sensors among a plurality of predetermined reference postures with respect to the folded state, identify a reference driving scheme corresponding to the reference posture among a plurality of reference driving schemes, and based on controlling the first actuator and the second actuator according to the reference driving scheme, change the folded state to the unfolded state.
Inventor(s): Sangheon KIM of Suwon-si KR for samsung electronics co., ltd., Dukhyun KIM of Suwon-si KR for samsung electronics co., ltd., Junsung KIM of Suwon-si KR for samsung electronics co., ltd., Dongil SON of Suwon-si KR for samsung electronics co., ltd., Yoechan SONG of Suwon-si KR for samsung electronics co., ltd., Yeunwook LIM of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H04M3/51, H04M3/523
CPC Code(s): H04M3/5191
Abstract: an electronic device is provided. the electronic device includes a communication circuit, memory storing one or more computer programs, and one or more processors electrically connected to the communication circuit and the memory. in addition, the one or more computer programs include computer-executable instructions that, when executed by the one or more processors individually or collectively cause the electronic device to acquire a user input, identify a task based on the user input, transmit a request to establish a first session for a voice call to an external electronic device in order to perform the task, receive a response from the external electronic device, determine, based on the response, whether a responder of the voice call is a voice agent based on machine learning, and transmit data information including information associated with the task to the external electronic device based on the determination that the responder is the voice agent.
Inventor(s): Kibum SEONG of Suwon-si KR for samsung electronics co., ltd., Weonhee LEE of Suwon-si KR for samsung electronics co., ltd., Bonseuk GOO of Suwon-si KR for samsung electronics co., ltd., Youngtae KIM of Suwon-si KR for samsung electronics co., ltd., Byungseok SOH of Suwon-si KR for samsung electronics co., ltd., Kisung LEE of Suwon-si KR for samsung electronics co., ltd., Youngchol LEE of Suwon-si KR for samsung electronics co., ltd., Yongseok JANG of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H04N9/31, G06T7/55, G06T7/60, G06T7/70, G06T11/00
CPC Code(s): H04N9/3185
Abstract: an electronic device for providing a video call function, includes: a projector; a camera; a sensor configured to obtain a distance from an external object; memory storing at least one instruction; and at least one processor configured to execute the at least one instruction to: capture a user through the camera to obtain a first user video based on the video call being executed, identify a horizontal correction angle and a vertical correction angle based on the first user video, a rotational angle of the camera, a projection angle of the projector, and a sensing value obtained through the sensor, obtain a frontal video of the user based on the first user video, the horizontal correction angle, and the vertical correction angle, and control the projector so that a video call screen including the obtained frontal video of the user is projected.
Inventor(s): Sangki YOON of Suwon-si KR for samsung electronics co., ltd., Kibum Seong of Suwon-si KR for samsung electronics co., ltd., Bonseuk Goo of Suwon-si KR for samsung electronics co., ltd., Youngtae Kim of Suwon-si KR for samsung electronics co., ltd., Byungseok Soh of Suwon-si KR for samsung electronics co., ltd., Kisung Lee of Suwon-si KR for samsung electronics co., ltd., Youngchol Lee of Suwon-si KR for samsung electronics co., ltd., Weonhee Lee of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H04N9/31, G06F3/01
CPC Code(s): H04N9/3194
Abstract: an electronic device may include: a projector; at least one sensor; at least one processor; memory storing instructions that, when executed by the at least one processor, cause the at least one processor to: identify a user gaze based on first sensing data obtained through the at least one sensor; divide a projection image stored in the memory into a first image region corresponding to the user gaze and a second image region which is a remaining region other than the first image region; modify the projection image to include the first image region of a first luminance value and the second image region of a second luminance value different from the first luminance value; and control the projector to project the modified projection image.
Inventor(s): Kisung LEE of Suwon-si KR for samsung electronics co., ltd., Bonseuk GOO of Suwon-si KR for samsung electronics co., ltd., Youngtae KIM of Suwon-si KR for samsung electronics co., ltd., Byungseok SOH of Suwon-si KR for samsung electronics co., ltd., Sangki YOON of Suwon-si KR for samsung electronics co., ltd., Youngchol LEE of Suwon-si KR for samsung electronics co., ltd., Weonhee LEE of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H04N9/31
CPC Code(s): H04N9/3194
Abstract: provided is an electronic device including a projector, a communication interface configured to communicate with an external device, and at least one processor configured to, based on receiving a user input for projecting a first content from the electronic device and projecting a second content from the external device, obtain a difference value between a first luminance value corresponding to the first content and a second luminance value corresponding to the second content, obtain a projection interval of the first content and the second content based on the difference value, control the projector to project the first content based on the projection interval, and transmit the second content and a control signal for projecting the second content to the external device through the communication interface.
Inventor(s): Narae Choi of Suwon-si KR for samsung electronics co., ltd., Minsoo Park of Suwon-si KR for samsung electronics co., ltd., Minwoo Park of Suwon-si KR for samsung electronics co., ltd., Anish Tamse of Suwon-si KR for samsung electronics co., ltd., Seungsoo Jeong of Suwon-si KR for samsung electronics co., ltd., Kiho Choi of Suwon-si KR for samsung electronics co., ltd., Woongil Choi of Suwon-si KR for samsung electronics co., ltd., Yinji Piao of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H04N19/593, H04N19/11, H04N19/132, H04N19/136, H04N19/176, H04N19/82
CPC Code(s): H04N19/593
Abstract: a video decoding method includes predicting a current block according to an intra prediction mode of the current block, determining whether to apply position dependent intra prediction filtering to the current block according to the intra prediction mode of the current block, when the position dependent intra prediction filtering is applied to the current block, determining at least one of an upper reference sample, a left reference sample, an upper weight, and a left weight for the position dependent intra prediction filtering of a current sample of the current block according to the intra prediction mode of the current block, and applying the position dependent intra prediction filtering to the current sample of the current block according to at least one of the upper reference sample, the left reference sample, the upper weight, and the left weight.
Inventor(s): Dongyoon KIM of Suwon-si KR for samsung electronics co., ltd., Kisung LEE of Suwon-si KR for samsung electronics co., ltd., Yongseok JANG of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H04N23/53, G06T3/40
CPC Code(s): H04N23/53
Abstract: a display device may including: a mirror display including a plurality of blocks; a camera; and at least one processor configured to control at least one of a reflectance and display of the plurality of blocks, where the at least one processor is configured to: control first blocks among the plurality of blocks to display a content, control second blocks among the plurality of blocks to have a first reflectance providing at least a part of a mirror image on a front side of the mirror display, identify a second part of the mirror image corresponding to the first blocks based on an image captured by the camera, control the first blocks to display the second part of the mirror image and the content by overlapping the content with the second part of the mirror image.
Inventor(s): Daehee PARK of Suwon-si KR for samsung electronics co., ltd., Chonghwa SEO of Suwon-si KR for samsung electronics co., ltd., Jongwon LEE of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H04N23/65, G06T7/80
CPC Code(s): H04N23/65
Abstract: an embodiment of the disclosure provides a method and a device configured to: in a state in which transmission power of a communication module is cut off, obtain a reference image using a camera module; store the obtained reference image in a memory; in a state in which a designated transmission power related to malfunction of the camera module is configured in the communication module, obtain a comparison image using the camera module; compare the reference image and the comparison image to determine an error in the comparison image; and determine, based on a result of the determination, the maximum transmission power of the communication module at the time of using the camera module.
Inventor(s): DONG-JIN PARK of SUWON-SI KR for samsung electronics co., ltd., WOO SEOK CHOI of SUWON-SI KR for samsung electronics co., ltd., JEE HONG LEE of SUWON-SI KR for samsung electronics co., ltd.
IPC Code(s): H04N25/11, G06T3/4015, H04N25/704, H10F39/00
CPC Code(s): H04N25/11
Abstract: an image sensor includes a pixel array including a plurality of normal pixels, a plurality of phase detection groups, and a color filter array. each phase detection group includes a first phase detection pixel and a second phase detection pixel disposed adjacent to the first phase detection pixel. the color filter array includes a plurality of unit groups. each unit group includes a plurality of color filters of a same color arranged in an m�n matrix on the pixel array, wherein m and n are natural numbers. a first color filter among the color filters of a first color is disposed on the first phase detection pixel of one of the unit groups and a second color filter among the color filters of a second color different from the first color is disposed on the second phase detection pixel of another one of the unit groups.
Inventor(s): Dongyoon KIM of Suwon-si KR for samsung electronics co., ltd., Jongbae KIM of Suwon-si KR for samsung electronics co., ltd., Kisung LEE of Suwon-si KR for samsung electronics co., ltd., Hoseok WEY of Suwon-si KR for samsung electronics co., ltd., Yoonjae LEE of Suwon-si KR for samsung electronics co., ltd., Yongseok JANG of Suwon-si KR for samsung electronics co., ltd., Woosung CHUNG of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H04R1/10, G06F3/16
CPC Code(s): H04R1/1083
Abstract: an electronic apparatus may include a memory, a communication interface configured to perform communication with an external server and at least one processor including processing circuitry, and the at least one processor may be configured to obtain audio data for ambient sound, obtain a target audio signal of a preset type from the audio data, obtain sound quality information of the target audio signal, based on the sound quality information being not equal to or greater than a threshold grade, transmit the target audio signal to the external server through the communication interface, receive a source audio signal corresponding to the target audio signal from the external server through the communication interface, identify a playback time of the source audio signal based on the target audio signal, and provide a synthesized audio signal in which an inversion signal corresponding to the audio data and the source audio signal are synthesized based on the playback time.
Inventor(s): Sangjun LEE of Suwon-si KR for samsung electronics co., ltd., Hyoseok NA of Suwon-si KR for samsung electronics co., ltd., Seunghyuk LEE of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H04R3/00, H04R3/12
CPC Code(s): H04R3/002
Abstract: an audio device for blocking noise generated in an idle state in an electronic device is provided. the audio device includes a processor configured to output an audio signal, an audio amplifier configured to amplify and output the audio signal output from the processor through an interface electrically connected to the processor, a switching part configured to switch the amplified audio signal output from the audio amplifier to a sound output in response to a switching control signal (en/dis), the sound output configured to output the amplified audio signal transferred through the switching part to an outside, and a rectifier configured to output the switching control signal (en/dis) for enabling the switching part if there is the audio signal transferred from the processor to the audio amplifier through the interface.
Inventor(s): Mohan Reddy Duggi of Basking Ridge NJ US for samsung electronics co., ltd.
IPC Code(s): H04W8/18
CPC Code(s): H04W8/18
Abstract: a method includes providing, by at least one processing device, a first set of assignments of international mobile equipment identifiers (imeis) to a plurality of subscriber identity modules (sims) associated with an electronic device. the method also includes monitoring, by the at least one processing device, each of a plurality of service registration statuses associated with the sims for a service registration failure. the method further includes, in response to at least one service registration failure being detected, providing, by the at least one processing device, a second set of assignments of imeis to the sims. the second set of assignments is different from the first set of assignments.
Inventor(s): Kiran Gurudev KAPALE of Bangalore IN for samsung electronics co., ltd., Arunprasath RAMAMOORTHY of Bangalore IN for samsung electronics co., ltd., Basavaraj Jayawant PATTAN of Bangalore IN for samsung electronics co., ltd.
IPC Code(s): H04W12/02, H04L67/306, H04L67/52
CPC Code(s): H04W12/02
Abstract: the disclosure relates to a 5g or 6g communication system for supporting a higher data transmission rate. the present subject matter refers to method and apparatus for managing provision (or, dissemination) of a location information of a client device. the method includes instructing a client device for sharing the location information; receiving the location information and a request for managing dissemination of the location information; receiving a list for managing dissemination of the location information from the client device. the method includes determining if the client device is authorized to request managing dissemination of the location information based on a client profile and managing dissemination of the location information to the one or more mcx service user in accordance with the list based on determination that the client device is authorized to request managing dissemination of the location information.
Inventor(s): Chadi KHIRALLAH of Staines GB for samsung electronics co., ltd., Mahmoud WATFA of Staines GB for samsung electronics co., ltd., Erik GUTTMAN of Staines GB for samsung electronics co., ltd.
IPC Code(s): H04W28/02, H04W52/36
CPC Code(s): H04W28/0268
Abstract: the disclosure relates to a 5generation (5g) or 6generation (6g) communication system for supporting a higher data transmission rate. a method performed by a network entity in a wireless communications network is provided. the method includes obtaining energy information associated with the wireless communications network and determining, based on the energy information, at least one of a quality of service (qos) profile associated with a qos flow of the wireless communications network and a qos profile associated with a user equipment (ue).
Inventor(s): Chao Geng of Suzhou CN for samsung electronics co., ltd.
IPC Code(s): H04W48/08, H04W48/16
CPC Code(s): H04W48/08
Abstract: a method, a base station, and a user equipment (ue) for wireless communication are disclosed. the method includes communicating a change message between a base station and a ue indicating that system information is to be changed, the system information including a plurality of system information blocks (sibs); modifying a scheduling information list included in a system information block type1 (sib1) of the plurality of sibs; communicating the sib1 to the ue; and communicating other sibs other than the sib1 among the plurality of sibs to the ue based on a transmission order of the other sibs determined by the modified scheduling information list. in some embodiments, the change message may indicate that at least one sib of the other sibs is changed.
Inventor(s): Rubayet Shafin of Allen TX US for samsung electronics co., ltd., Boon Loong Ng of Plano TX US for samsung electronics co., ltd., Vishnu Vardhan Ratnam of Plano TX US for samsung electronics co., ltd., Peshal Nayak of Plano TX US for samsung electronics co., ltd., Yue Qi of Plano TX US for samsung electronics co., ltd., Elliot Jen of Taipei City TW for samsung electronics co., ltd.
IPC Code(s): H04W52/02, H04W24/02, H04W76/15
CPC Code(s): H04W52/0235
Abstract: a non-access point (ap) multi-link device (mld) in a wireless network, the non-ap mld comprising a memory, and a processor coupled to the memory, the processor configured to receive a first frame from an ap mld indicating a recommendation for a number of simultaneous links, and transmit a second frame to the ap mld indicating whether or not the non-ap mld intends to follow the recommendation.
Inventor(s): Sanjeewa Herath of Stittsville CA for samsung electronics co., ltd.
IPC Code(s): H04W52/42
CPC Code(s): H04W52/42
Abstract: in one embodiment, a method includes accessing a sequence of symbols, generating a signal from the symbols by mapping a first symbol to a first antenna and a second antenna, determining a first transmit power for the first symbol in the first antenna based on a first power scaling coefficient and a second transmit power for the first symbol in the second antenna based on a second power scaling coefficient, mapping a second symbol to the first antenna and the second antenna, determining a third transmit power for the second symbol in the first antenna based on a third power scaling coefficient and a fourth transmit power for the second symbol in the second antenna based on a fourth power scaling coefficient, wherein the first, second, third, and fourth transmit power is different from each other, and transmitting the generated signal by the first antenna and the second antenna.
20250126615. UE-INITIATED OPERATIONS_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Dalin Zhu of Allen TX US for samsung electronics co., ltd., Emad Nader Farag of Flanders NJ US for samsung electronics co., ltd., Eko Onggosanusi of Coppell TX US for samsung electronics co., ltd.
IPC Code(s): H04W72/1268, H04W72/232
CPC Code(s): H04W72/1268
Abstract: methods and apparatuses for user equipment (ue)-initiated operations. a method performed by a ue includes receiving first information related to a scheduling request (sr) for transmission of a beam report, receiving second information related to transmission of the beam report, and determining, based on the first information, a first uplink (ul) resource for transmitting the sr. the method further includes determining, based on at least the second information, a second ul resource for transmitting the beam report, transmitting, based on the first ul resource, the sr, and transmitting, based on the second ul resource, the beam report. the second information includes an indicator indicating that the second ul resource is dynamically scheduled or configured by radio resource control (rrc).
Inventor(s): Juhyuk IM of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H04W72/25, H03M13/39, H04W4/40
CPC Code(s): H04W72/25
Abstract: an operation method of a wireless communication device for performing sidelink-based vehicle-to-everything (v2x) communication includes decoding first sidelink control information (sci) to obtain a first decoding result, the first sci being contained in a received physical sidelink control channel (pscch), decoding second sci including obtaining a plurality of log likelihood ratio (llr) values by demodulating the second sci, storing the plurality of llr values in a plurality of deinterleaving buffers such that the plurality of llr values are deinterleaved, and decoding the plurality of llr values stored in the plurality of deinterleaving buffers to obtain a second decoding result, the second sci being contained in a physical sidelink shared channel (pssch), and the pssch being received based on the first decoding result, and decoding the pssch based on the second decoding result.
Inventor(s): Jung Hyun Bae of San Diego CA US for samsung electronics co., ltd.
IPC Code(s): H04W72/51, H04W72/231, H04W76/15
CPC Code(s): H04W72/51
Abstract: a system and a method are disclosed for pdcch span-based monitoring, the method includes sending, by a user equipment (ue), first information indicating that the ue supports a first set of capabilities and a second set of capabilities different from the first set of capabilities, determining, by the ue, whether a monitored span pattern satisfies a first span pattern associated with the first set of capabilities, and performing, by the ue, physical downlink control channel (pdcch) span-based monitoring based on a first value associated with the first set of capabilities or based on a second value associated with the second set of capabilities.
20250126637. DYNAMIC SUB-CHANNEL PRE-ALLOCATION_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Vishnu Vardhan Ratnam of Frisco TX US for samsung electronics co., ltd., Boon Loong Ng of Plano TX US for samsung electronics co., ltd., Rubayet Shafin of Allen TX US for samsung electronics co., ltd., Peshal Nayak of Plano TX US for samsung electronics co., ltd., Yue Qi of Plano TX US for samsung electronics co., ltd., Elliot Jen of Taipei City TW for samsung electronics co., ltd.
IPC Code(s): H04W74/04, H04W76/15
CPC Code(s): H04W74/04
Abstract: an access point (ap) in a wireless network, the ap comprising a memory and a processor coupled to the memory, the processor is configured obtain a transmission opportunity (txop) or service period (sp), transmit, to a first station (sta) during the txop or the sp, an indication allocating a first subchannel to the first sta at a first transmission start time, wherein the first subchannel is out of an operating channel width of the first sta, transmit, to the second sta, an indication allocating a second subchannel to the second sta at a second transmission start time, transmit, to the first sta during the txop or the sp on the first subchannel, a first frame at the first transmission start time, and transmit, to the second sta during the txop or the sp on the second subchannel, a second frame at the second transmission start time.
Inventor(s): Tushar VRIND of Bengaluru IN for samsung electronics co., ltd., Chandan KUMAR of Bengaluru IN for samsung electronics co., ltd., Debabrata DAS of Bengaluru IN for samsung electronics co., ltd.
IPC Code(s): H04W76/15, H04B7/06, H04W64/00, H04W84/06
CPC Code(s): H04W76/15
Abstract: there is provided a method for assigning an aerial cell to one or more user equipment (ues) in a wireless communication system. the method includes establishing a data connection between one or more user equipments (ues) and a terrestrial cell, receiving one or more feedback parameters from each of the one or more ues via the data connection, and assigning an aerial cell to a first ue, among the one or more ues, based on at least one of the one or more feedback parameters received from the first ue and a number of the one or more ues present in a coverage area of the aerial cell, wherein the coverage area is part of a terrestrial coverage area of the terrestrial cell.
Inventor(s): Jeongsoo LEE of Suwon-si KR for samsung electronics co., ltd., Ilyong PARK of Suwon-si KR for samsung electronics co., ltd., Soosin HWANG of Suwon-si KR for samsung electronics co., ltd., Jaehwan SIM of Suwon-si KR for samsung electronics co., ltd., Jongjik LEE of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H04W76/15, H04W4/80
CPC Code(s): H04W76/15
Abstract: a first hub device is provided. the first hub device includes: a communication interface; at least one processor; and a memory storing instructions that, when executed by the at least one processor, cause the first hub device to: broadcast, through the communication interface, a connection request to search for a device configured to connect to a server, based on a predetermined event being identified; and transmit, through the communication interface, a candidate list indicating the first hub device and a second hub device to the second hub device based on a response corresponding to the connection request being received from the second hub device.
Inventor(s): Kiran Gurudev KAPALE of Bangalore IN for samsung electronics co., ltd., Arunprasath RAMAMOORTHY of Bangalore IN for samsung electronics co., ltd., Basavaraj Jayawant PATTAN of Bangalore IN for samsung electronics co., ltd.
IPC Code(s): H04W76/45, H04W4/10, H04W76/10
CPC Code(s): H04W76/45
Abstract: the disclosure relates to a 5g or 6g communication system for supporting a higher data transmission rate. in an embodiment, a method for a remotely initiated mission critical push-to-talk (mcptt) call, by the second mcptt client, includes receiving, by a second mcptt client, a remotely initiated mcptt call request from a first mcptt client via a mcptt server to initiate a remote call, notifying, the first mcptt client, that the second mcptt client received the remotely initiated mcptt call request via the mcptt server and initiating the mcptt remote call with one of the first mcptt client and at least one other mcptt client using the at least one call set up parameter and an indication.
Inventor(s): Anil AGIWAL of Suwon-si KR for samsung electronics co., ltd., Hyunjeong KANG of Suwon-si KR for samsung electronics co., ltd., Hyunseok RYU of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H04W88/06, H04W4/44, H04W76/14, H04W76/27, H04W92/18
CPC Code(s): H04W88/06
Abstract: a communication method and system for converging a 5generation (5g) communication system for supporting higher data rates beyond a 4generation (4g) system with a technology for internet of things (iot) are provided. the communication method and system include intelligent services based on the 5g communication technology and the iot-related technology, such as smart home, smart building, smart city, smart car, connected car, health care, digital education, smart retail, security and safety services. a method of a user equipment (ue) for performing a vehicle-to-everything (v2x) sidelink communication is provided.
Inventor(s): Jongkeun KIM of Suwon-si KR for samsung electronics co., ltd., Jinwook BAIK of Suwon-si KR for samsung electronics co., ltd., Jaeho KANG of Suwon-si KR for samsung electronics co., ltd., Yonghwa HAN of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H05K5/02, F16C11/04
CPC Code(s): H05K5/0226
Abstract: disclosed are a portable electronic device including a housing, in which at least a portion of a display is disposed, and a hinge structure coupled to the housing, wherein at least one of arms included in the hinge structure includes a plurality of sub-arms, and is rotated at a specific angle and in different directions due to pressing of an elastic body included in the hinge structure, and a portable electronic device including the same.
Inventor(s): Yongseok LEE of Suwon-si KR for samsung electronics co., ltd., Byounguk YOON of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H05K5/02
CPC Code(s): H05K5/0295
Abstract: an electronic device according to one embodiment includes: a housing including a through-hole; a printed circuit board; and a tray which moves to the outside of the through-hole according to movement in the first direction, or of which at least one portion is arranged on the printed circuit board according to movement in the second direction in order to be inserted into the through-hole, where the tray includes: a first accommodation hole for insertion of an external member penetrating the outer surface of the tray; and an elastic member which includes an insertion hole, and which can be deformed by the external member, and the tray is inserted into the insertion hole so as to be movable to the outside of the through-hole by movement in the first direction of the external member in contact with the elastic member.
Inventor(s): Jinbum Kim of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H10B12/00
CPC Code(s): H10B12/05
Abstract: a method of manufacturing a semiconductor memory device includes forming a metal seed pattern having a plurality of openings on a substrate, forming a metal silicide pattern from the substrate and the metal seed pattern, growing a single crystal semiconductor pattern in a vertical direction at an interface between the substrate and the metal silicide pattern where the vertical direction is perpendicular to the substrate, and growing a sacrificial semiconductor pattern in the vertical direction at an interface between the metal silicide pattern and the single crystal semiconductor pattern.
20250126775. SEMICONDUCTOR DEVICES_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Sangho LEE of Suwon-si KR for samsung electronics co., ltd., Moonyoung JEONG of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H10B12/00
CPC Code(s): H10B12/482
Abstract: disclosed is a semiconductor device comprising: first and second gate structures adjacent to each other; a first active pillar and a second active pillar between the first gate structure and the second gate structure; a channel capping layer between the first active pillar and the second active pillar; and a bit-line structure in contact with the first active pillar, the second active pillar, and the channel capping layer, wherein each of the first and second gate structures includes: a first word line and a second word line that are spaced apart from each other; a gate dielectric layer in contact with the first word line and the second word line; and a gate capping layer in contact with the gate dielectric layer and spaced apart from the first word line and the second word line, and wherein the gate capping layer is in contact with the bit-line structure.
20250126778. INTEGRATED CIRCUIT DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Sangmin Lee of Suwon-si KR for samsung electronics co., ltd., Yeonjin Hwang of Suwon-si KR for samsung electronics co., ltd., Munjun Kim of Suwon-si KR for samsung electronics co., ltd., Iksoo Kim of Suwon-si KR for samsung electronics co., ltd., Junwon Lee of Suwon-si KR for samsung electronics co., ltd., Younseok Choi of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H10B12/00
CPC Code(s): H10B12/485
Abstract: an integrated circuit device and a method of manufacturing the same are provided. the integrated circuit device includes: a substrate having a plurality of active regions; a bit line extending on the substrate in a horizontal direction parallel to an upper surface of the substrate; a direct contact electrically connected to a first active region of the plurality of active regions and connected to the bit line; a contact plug electrically connected to a second active region of the plurality of active regions adjacent to the first active region; and an outer insulation spacer between the bit line and the contact plug and overlapping the bit line in a vertical direction perpendicular to the upper surface of the substrate. the outer insulation spacer includes a doped region doped with a metal element.
Inventor(s): Donghoon Kwon of Suwon-si KR for samsung electronics co., ltd., Yong Sik Chung of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H10B43/27, H01L23/522
CPC Code(s): H10B43/27
Abstract: a semiconductor device includes a substrate including a circuit region and a cell region. the cell region includes a gate stacking structure, a channel structure that extends into the gate stacking structure and is on the cell array region, a through-gate contact portion that extends into the gate stacking structure and is electrically connected to a connection gate electrode, and an upper gate contact portion that is electrically connected to an upper gate electrode, where the upper gate electrode is separated from the substrate by a first distance, the connection gate electrode is separated from the substrate by a second distance, and where the second distance is less than the first distance, and where the upper gate contact portion includes a first portion and a second portion, and a boundary between the first portion and the second portion has a step shape.
Inventor(s): Minsoo Shin of Suwon-si KR for samsung electronics co., ltd., Joongshik Shin of Suwon-si KR for samsung electronics co., ltd., Hyeongjin Kim of Suwon-si KR for samsung electronics co., ltd., Jeehoon Han of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H10B43/27, H01L23/00, H01L25/065, H01L25/18, H10B80/00
CPC Code(s): H10B43/27
Abstract: a three-dimensional semiconductor memory device includes a plurality of peripheral circuit structures on a substrate, a plurality of stacked structures, each the plurality of stacked structures including a plurality of gate electrodes stacked on the plurality of peripheral circuit structure in a first direction perpendicular to a lower surface of the substrate, and the plurality of stacked structure being spaced apart from each other in a second direction parallel to the lower surface of the substrate, a separation structure extending between the plurality of stacked structures in a third direction intersecting the first direction and the second direction, the separation structure including a plurality of support patterns that are spaced apart from each other in the third direction in the separation structure; and an internal insulating layer surrounding a side surface of each of the plurality of support patterns.
Inventor(s): Minyong Lee of Suwon-si KR for samsung electronics co., ltd., Jiyoung Kim of Suwon-si KR for samsung electronics co., ltd., Sehoon Lee of Suwon-si KR for samsung electronics co., ltd., Junhyoung Kim of Suwon-si KR for samsung electronics co., ltd., Sukkang Sung of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H10B43/27, H10B41/10, H10B41/27, H10B41/41, H10B43/10, H10B43/40
CPC Code(s): H10B43/27
Abstract: an example non-volatile memory device includes a substrate including a first cell region, a second cell region, and a connection region between the first cell region and the second cell region, a mold structure including a plurality of gate electrodes being stacked in a stepped pattern in a pad region, a trench along a profile of the mold structure on the pad region, the trench including a bottom surface having a stair shape and a first sidewall on a boundary between the pad region and a wall region, a liner film on the first sidewall of the trench, a recess in the trench and exposing a pad portion of a gate electrode, a cell contact provided at the recess and connected with the pad portion, and a cover insulating layer provided at the trench. the liner film has a different etch selectivity with respect to the cover insulating layer.
Inventor(s): Suhwan LIM of Hanam-si KR for samsung electronics co., ltd., Nambin KIM of Seoul KR for samsung electronics co., ltd., Samki KIM of Hwaseong-si KR for samsung electronics co., ltd., Taehun KIM of Gwacheon-si KR for samsung electronics co., ltd., Hanvit YANG of Suwon-si KR for samsung electronics co., ltd., Changhee LEE of Hwaseong-si KR for samsung electronics co., ltd., Jaehun JUNG of Seongnam-si KR for samsung electronics co., ltd., Hyeongwon CHOI of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H10B43/27, H10B41/27, H10B41/35, H10B41/40, H10B43/35, H10B43/40
CPC Code(s): H10B43/27
Abstract: a semiconductor device includes a lower structure including a semiconductor substrate and circuit devices on the semiconductor substrate; a stack structure including interlayer insulating layers and gate electrodes alternating in a vertical direction; and a channel structure penetrating the stack structure. the channel structure includes a core insulating layer, a channel layer, a gate dielectric layer, and a channel pad. a portion of the channel pad overlaps an uppermost gate electrode among the gate electrodes in a horizontal direction. the channel pad includes a first pad layer and a second pad layer on the first pad layer. the second pad layer includes doped polysilicon that is doped with impurities and having n-type conductivity. the first pad layer includes at least one of an undoped polysilicon region and a doped polysilicon region having n-type conductivity and having an impurity concentration lower than an impurity concentration of the second pad layer.
20250126799. SEMICONDUCTOR DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Kang-Oh YUN of Suwon-si KR for samsung electronics co., ltd., Yunjo LEE of Suwon-si KR for samsung electronics co., ltd., Dongjin LEE of Suwon-si KR for samsung electronics co., ltd., Jaeduk LEE of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H10B43/40, H10B41/27, H10B41/41, H10B43/27
CPC Code(s): H10B43/40
Abstract: a semiconductor device may include a substrate containing first to third doping regions, first and second gate structures between the first and second doping regions, and a gate separation layer between the first and second gate structures. each of the first and second gate structures may include a first gate dielectric layer, a first gate conductive layer on the first gate dielectric layer, and a second gate conductive layer between the gate separation layer and the first gate conductive layer. the gate separation layer may include a first sidewall in contact with the first gate structure and a second sidewall in contact with the second gate structure. a top surface of the gate separation layer may be at a same level as a top surface of the second gate conductive layer.
20250126801. SEMICONDUCTOR MEMORY DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Ju Seong Min of Suwon-si KR for samsung electronics co., ltd., Hak Seon Kim of Suwon-si KR for samsung electronics co., ltd., Jae-Bok Baek of Suwon-si KR for samsung electronics co., ltd., Kang-Oh Yun of Suwon-si KR for samsung electronics co., ltd., Taek Kyu Yoon of Suwon-si KR for samsung electronics co., ltd., Dong Jin Lee of Suwon-si KR for samsung electronics co., ltd., Jae Duk Lee of Suwon-si KR for samsung electronics co., ltd., Se Jin Lim of Suwon-si KR for samsung electronics co., ltd., Jee Hoon Han of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H10B43/40, H10B43/27
CPC Code(s): H10B43/40
Abstract: the present disclosure relates to semiconductor memory devices. an example semiconductor memory device includes a cell region and a peripheral circuit region electrically connected with the cell region. the cell region includes a plurality of gate electrodes spaced apart from each other and stacked in a vertical direction, and a channel structure extending through the plurality of gate electrodes in the vertical direction. the peripheral circuit region includes a substrate, a first element isolation structure, a first gate structure on the first active region, a second element isolation structure, a second gate structure on the second active region, a third element isolation structure, and a third gate structure on the third active region. the third element isolation structure includes a first element isolation pattern and a second element isolation pattern. the first element isolation pattern and the second element isolation pattern include different materials from each other.
Inventor(s): Sijung YOO of Suwon-si KR for samsung electronics co., ltd., Seunggeol NAM of Suwon-si KR for samsung electronics co., ltd., Donghoon KIM of Suwon-si KR for samsung electronics co., ltd., Hyunjae LEE of Suwon-si KR for samsung electronics co., ltd., Dukhyun CHOE of Suwon-si KR for samsung electronics co., ltd., Seokhoon CHOI of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H10B51/30, G06N3/063, H01L29/51, H01L29/78
CPC Code(s): H10B51/30
Abstract: a ferroelectric field effect transistor includes a channel, a gate electrode provided to face the channel, a ferroelectric layer provided between the channel and the gate electrode, an interfacial layer provided between the channel and the ferroelectric layer, and a diffusion barrier layer provided between the ferroelectric layer and the gate electrode, wherein the diffusion barrier layer includes sion, the diffusion barrier layer has an oxygen concentration gradient that gradually decreases from a first surface of the diffusion barrier layer facing the gate electrode toward a second surface of the diffusion barrier layer facing the ferroelectric layer, and the diffusion barrier layer may have a nitrogen concentration gradient that gradually increases from the first surface toward the second surface.
Inventor(s): Seunggeol NAM of Suwon-si KR for samsung electronics co., ltd., Sijung YOO of Suwon-si KR for samsung electronics co., ltd., Minhyun LEE of Suwon-si KR for samsung electronics co., ltd., Hyunjae LEE of Suwon-si KR for samsung electronics co., ltd., Seokhoon CHOI of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H10B51/30, H10B51/20
CPC Code(s): H10B51/30
Abstract: a semiconductor device, and a memory apparatus and an electronic apparatus including the same are provided. the semiconductor device may include a gate electrode, a ferroelectric layer on the gate electrode, a channel layer on the ferroelectric layer, and a plurality of nanostructures spaced apart from each other in the ferroelectric layer. the plurality of nanostructures may be adjacent to the gate electrode or the channel layer, or a portion of the plurality of nanostructures may be adjacent to the gate electrode and the rest portion of the plurality of nanostructures may be adjacent to the channel layer.
20250126810. MEMORY DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Changyoung LEE of Suwon-si KR for samsung electronics co., ltd., Sanghoon Jung of Suwon-si KR for samsung electronics co., ltd., Youngseok Park of Suwon-si KR for samsung electronics co., ltd., Changsik Yoo of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H10B80/00, H01L23/00, H01L25/065, H01L25/18, H10B12/00
CPC Code(s): H10B80/00
Abstract: a memory device is provided. the memory device includes: a plurality of sub-array regions arranged spaced apart in a first and second horizontal directions, and each sub-array region including a plurality of memory cells, the first horizontal direction crossing the second horizontal direction; a dummy region disposed between the plurality of sub-array regions, the dummy region including a first metal pattern extending in the first horizontal direction at a first layer, a first lower contact extending in a vertical direction on a first portion of the first metal pattern, and a second lower contact extending in the vertical direction on a second portion of the first metal pattern; and a peripheral circuit region including a first upper contact connected to the first lower contact, a first circuit connected to the first upper contact, a second upper contact connected to the second lower contact, and a second circuit connected to the second upper contact.
20250126816. SEMICONDUCTOR DEVICES_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Cheol Ju Yun of Suwon-si KR for samsung electronics co., ltd., Youn Seon Kang of Yongin-si KR for samsung electronics co., ltd., Eun Shoo Han of Hwaseong-si KR for samsung electronics co., ltd.
IPC Code(s): H10D1/68, H10B12/00
CPC Code(s): H10D1/714
Abstract: there is provided a semiconductor device capable of improving performance and reliability of a device, by adjusting the arrangement of penetration patterns included in an electrode support for supporting the lower electrode. the semiconductor device includes a plurality of lower electrodes that are aligned with each other on a substrate along a first direction and a second direction different from the first direction, and a first electrode support that supports the lower electrodes, and includes a plurality of first penetration patterns, wherein the first electrode support includes a center region, and an edge region defined along a periphery of the center region, wherein the first penetration patterns include center penetration patterns that are spaced apart by a first interval in the center region, and wherein the first penetration patterns include edge penetration patterns that are spaced apart by a second interval different from the first interval in the edge region.
20250126835. SEMICONDUCTOR DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Yongjin LEE of Suwon-si KR for samsung electronics co., ltd., Min Tae RYU of Suwon-si KR for samsung electronics co., ltd., Younggeun SONG of Suwon-si KR for samsung electronics co., ltd., Sanghoon AHN of Suwon-si KR for samsung electronics co., ltd., Min Hee CHO of Suwon-si KR for samsung electronics co., ltd., Daewon HA of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L29/786, H01L29/66
CPC Code(s): H10D30/6728
Abstract: a semiconductor device may include peripheral circuit structures on a substrate, an interlayer insulating layer on the peripheral circuit structure, a bit line extending in a first direction in the interlayer insulating layer, a semiconductor pattern on the bit line, and including first and second vertical portions facing each other in the first direction and a horizontal portion connecting the first and second vertical portions to each other, first and second word lines on the horizontal portion and adjacent to the first and second vertical portions, respectively, and a gate insulating pattern interposed between the first vertical portion and the first word line, and between the second vertical portion and the second word line. an upper surface of the interlayer insulating layer and an upper surface of the bit line are coplanar with each other.
Inventor(s): Junyoung KWON of Suwon-si KR for samsung electronics co., ltd., Changhyun KIM of Suwon-si KR for samsung electronics co., ltd., Kyung-Eun BYUN of Suwon-si KR for samsung electronics co., ltd., Minsu SEOL of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L29/786, H01L29/41, H01L29/417, H01L29/423, H01L29/66, H01L29/775
CPC Code(s): H10D30/6757
Abstract: a semiconductor device includes a first channel layer and a second channel layer spaced from each other in a first direction and each include a two-dimensional (2d) semiconductor material, a first source electrode between the first channel layer and the second channel layer to be simultaneously in contact with the first channel layer and the second channel layer, a first drain electrode between the first channel layer and the second channel layer to be spaced apart from the first source electrode in a second direction perpendicular to the first direction and simultaneously in contact with the first channel layer and the second channel layer, a first gate electrode arranged in a first internal space surrounded by the first source electrode, the first drain electrode, the first channel layer, and the second channel layer, and a first gate insulating layer surrounding the first gate electrode in the first internal space.
Inventor(s): Jae-hyun PARK of Hwaseong-si KR for samsung electronics co., ltd., Kye-hyun BAEK of Suwon-si KR for samsung electronics co., ltd., Yong-ho JEON of Hwaseong-si KR for samsung electronics co., ltd., Cheol KIM of Hwaseong-si KR for samsung electronics co., ltd., Sung-il PARK of Suwon-si KR for samsung electronics co., ltd., Yun-il LEE of Anyang-si KR for samsung electronics co., ltd., Hyung-suk LEE of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H10D62/10, H10D30/01, H10D84/01, H10D84/03, H10D84/83
CPC Code(s): H10D62/116
Abstract: an integrated circuit (ic) device includes a first region and a second region adjacent to each other along a first direction on a substrate, fin patterns in each of the first and second regions extending along a second direction perpendicular to the first direction; gate electrodes extending along the first direction and intersecting the fin patterns; and an isolation region between the first and second regions, a bottom of the isolation region having a non-uniform height relative to a bottom of the substrate.
20250126860. INTEGRATED CIRCUIT DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Jaehyun AHN of Suwon-si KR for samsung electronics co., ltd., Jinkyu KIM of Suwon-si KR for samsung electronics co., ltd., Hidenobu FUKUTOME of Suwon-si KR for samsung electronics co., ltd., Jeewoong KIM of Suwon-si KR for samsung electronics co., ltd., Yunsuk NAM of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L29/08, H01L23/528, H01L27/088, H01L29/06, H01L29/417, H01L29/423, H01L29/775, H01L29/786
CPC Code(s): H10D62/151
Abstract: an integrated circuit device includes: a substrate including a first surface and a second surface; a fin-type active area extending on the first surface of the substrate in a first horizontal direction, and including a first area and a second area that are adjacent to each other; a first source/drain area arranged on the first area of the fin-type active area; a second source/drain area arranged on the second area of the fin-type active area; and a first filling insulating layer extending between the first source/drain area and the second source/drain area, wherein the first area includes a first conductivity type, wherein the second area includes a second conductivity type that is different from the first conductivity type, and wherein a boundary between the first area and the second area includes a portion that is substantially perpendicular to the first horizontal direction, and overlaps the filling insulating layer.
20250126861. SEMICONDUCTOR DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Wooseok PARK of Suwon-si KR for samsung electronics co., ltd., Donghoon HWANG of Suwon-si KR for samsung electronics co., ltd., Myungil KANG of Suwon-si KR for samsung electronics co., ltd., Wookhwan SONG of Suwon-si KR for samsung electronics co., ltd., Doyoung CHOI of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L29/08, H01L29/06, H01L29/423, H01L29/775, H01L29/786
CPC Code(s): H10D62/151
Abstract: a semiconductor device includes: a substrate; an active region extending in a first direction on the substrate; a gate structure extending in a second direction on the active region and intersecting the active region; a source/drain region on the active region on a side of the gate structure; a separation pattern extending in the first direction and separating the gate structure; and a contact structure on the separation pattern and crossing the separation pattern, the contact structure being electrically connected to the source/drain region, wherein the contact structure includes a first portion and a second portion, the first portion contacts the separation pattern, the second portion contacts the source/drain region, a lower surface of the second portion is at a level lower than a lower surface of the first portion, and a lowermost end of the contact structure is spaced apart from the separation pattern.
Inventor(s): Minsu SEOL of Seoul KR for samsung electronics co., ltd., Hyeonsuk SHIN of Ulsan KR for samsung electronics co., ltd., Hyeonjin SHIN of Suwon-si KR for samsung electronics co., ltd., Hyuntae HWANG of Mokpo-si KR for samsung electronics co., ltd., Changseok LEE of Gwacheon-si KR for samsung electronics co., ltd., Seongin YOON of Ulsan KR for samsung electronics co., ltd.
IPC Code(s): H10D62/82, H01L21/02, H10D48/36, H10D62/80, H10D62/85
CPC Code(s): H10D62/82
Abstract: provided are a black phosphorus-two dimensional material complex and a method of manufacturing the black phosphorus-two dimensional material complex. the black phosphorus-two dimensional material complex includes: first and second two-dimensional material layers, which each have a two-dimensional crystal structure and are coupled to each other by van der waals force; and a black phosphorus sheet which between the first and second two-dimensional material layers and having a two-dimensional crystal structure in which a plurality of phosphorus atoms are covalently bonded.
Inventor(s): Jiwon PARK of Suwon-si KR for samsung electronics co., ltd., Minseok JO of Suwon-si KR for samsung electronics co., ltd., Jinyoung CHOI of Suwon-si KR for samsung electronics co., ltd., Jun-Youp LEE of Suwon-si KR for samsung electronics co., ltd., Hakjong LEE of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L29/423, H01L21/762, H01L23/522, H01L23/528, H01L27/092, H01L29/06, H01L29/08, H01L29/66, H01L29/786
CPC Code(s): H10D64/513
Abstract: a semiconductor device may include an active pattern on a substrate, defined by a trench, and extending in a first direction, a device isolation layer filling the trench, the substrate including a first surface in contact with a bottom surface of the device isolation layer and a second surface opposite to the first surface, a gate electrode extending in a second direction and cross the active pattern, the second direction crossing the first direction, a first division structure spaced apart from the gate electrode in the first and extending in the second direction, and a power delivery network layer on the second surface of the substrate. the first division structure may penetrate the device isolation layer, and a bottom surface of the first division structure may be coplanar with the second surface of the substrate.
20250126872. SEMICONDUCTOR MEMORY DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Byeongjun Bae of Suwon-si KR for samsung electronics co., ltd., Youngwoo Son of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L29/423, H10B12/00
CPC Code(s): H10D64/513
Abstract: provided is a semiconductor memory device. the semiconductor memory device includes a plurality of trenches including a plurality of first trenches in a substrate and a plurality of second trenches between ones of the plurality of first trenches, and a plurality of device isolation layers. a first height of a lowermost surface of a direct contact in a vertical direction may be higher than a second height of a lowermost surface of a buried contact in the vertical direction, relative to a lower surface of the substrate.
Inventor(s): Hyunjae LEE of Suwon-si KR for samsung electronics co., ltd., Seunggeol NAM of Suwon-si KR for samsung electronics co., ltd., Donghoon KIM of Suwon-si KR for samsung electronics co., ltd., Sijung YOO of Suwon-si KR for samsung electronics co., ltd., Dukhyun CHOE of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L29/51, H01L21/28, H01L29/78, H10B51/10, H10B51/30
CPC Code(s): H10D64/689
Abstract: provided is a semiconductor device including a channel layer including a semiconductor material, a ferroelectric layer arranged on the channel layer and including a ferroelectric material, a gate electrode arranged on the ferroelectric layer, a first insertion layer arranged between the ferroelectric layer and the gate electrode and including a first paraelectric material, and a second insertion layer arranged between the channel layer and the ferroelectric layer and including a second paraelectric material having a dielectric constant higher than a dielectric constant of the first paraelectric material.
Inventor(s): Sang Min YOO of Suwon-si KR for samsung electronics co., ltd., Ju Youn KIM of Suwon-si KR for samsung electronics co., ltd., Hyung Joo NA of Seoul KR for samsung electronics co., ltd., Bong Seok SUH of Seoul KR for samsung electronics co., ltd., Joo Ho JUNG of Suwon-si KR for samsung electronics co., ltd., Eui Chul HWANG of Seoul KR for samsung electronics co., ltd., Sung Moon LEE of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H10D84/83, H01L21/762, H10D30/69, H10D64/00
CPC Code(s): H10D84/834
Abstract: a semiconductor device includes a first active pattern extending lengthwise along a first direction and a second active pattern extending lengthwise along the first direction and spaced apart from the first active pattern in the first direction. the device also includes a field insulating film between the first active pattern and the second active pattern. an upper surface of the field insulating film is lower than or coplanar with upper surfaces of the first and second active patterns. the device further includes an element isolation structure in an isolation trench in the first active pattern and the field insulating film. an upper surface of the element isolation structure is higher than the upper surfaces of the first and second active patterns.
Inventor(s): Minsu SEOL of Suwon-si KR for samsung electronics co., ltd., Kyung-Eun BYUN of Suwon-si KR for samsung electronics co., ltd., Changhyun KIM of Suwon-si KR for samsung electronics co., ltd., Eunkyu LEE of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L27/092, H01L21/762, H01L29/06, H01L29/423, H01L29/66, H01L29/775, H01L29/786
CPC Code(s): H10D84/85
Abstract: a semiconductor device includes a dielectric wall provided in a direction perpendicular to a substrate, a first metal oxide field effect transistor (mosfet) provided on one side surface of the dielectric wall, a second mosfet provided above the first mosfet in a direction perpendicular to the substrate, and a third mosfet provided in parallel with the first mosfet on the other side surface of the dielectric wall.
Inventor(s): Kyung-Eun BYUN of Suwon-si KR for samsung electronics co., ltd., Minsu SEOL of Suwon-si KR for samsung electronics co., ltd., Junyoung KWON of Suwon-si KR for samsung electronics co., ltd., Huije RYU of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L27/092, H01L29/24, H01L29/76, H01L29/786
CPC Code(s): H10D84/85
Abstract: provided is a semiconductor device including a two-dimensional (2d) material. the semiconductor device may include a first channel including a first 2d material layer, a second channel apart from the first channel in a first direction and including a second 2d material layer, a common gate electrode between the first channel and the second channel, a first electrode and a second electrode apart from each other and respectively in contact with the first channel and the second channel, and a common electrode apart from the first electrode and the second electrode in a second direction intersecting the first direction and in contact with the first channel and the second channel. one of the first channel and the second channel may be an n-type channel and the other one may be a p-type channel.
20250126903. IMAGE SENSOR_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Jeongsoon KANG of Gumi-si KR for samsung electronics co., ltd., Mintae RYU of Hwaseong-si KR for samsung electronics co., ltd., Minsu LEE of Seongnam-si KR for samsung electronics co., ltd., Wonsok LEE of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H10F39/18, H10F39/00, H10F39/15
CPC Code(s): H10F39/18
Abstract: an image sensor includes a first substrate. a photoelectric conversion region is in the first substrate. a first interlayer insulating layer is on the first substrate. a transistor includes a bonding insulating layer on the first interlayer insulating layer, a semiconductor layer on the bonding insulating layer, and a first gate on the semiconductor layer. a bias pad is spaced apart from the semiconductor layer by the bonding insulating layer. the bias pad overlaps the first gate in a planar view. a second interlayer insulating layer covers the transistor.
20250126908. IMAGE SENSOR DEVICE_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Min-Woong SEO of Hwasung-si KR for samsung electronics co., ltd., JungChak AHN of Yongin-si KR for samsung electronics co., ltd., Jae-kyu LEE of Seongnam-si KR for samsung electronics co., ltd.
IPC Code(s): H10F39/00, H04N25/59, H04N25/60, H04N25/772, H10B12/00, H10F39/18
CPC Code(s): H10F39/80377
Abstract: an image sensor device includes a digital pixel that includes a photo detector, a comparator, and a memory circuit, a pixel driver that controls the digital pixel, and a digital logic circuit that performs a digital signal processing operation on a digital signal output from the digital pixel. the photo detector and a first portion of the comparator are formed in a first semiconductor die, a second portion of the comparator, the memory circuit, and the pixel driver are formed in a second semiconductor die under the first semiconductor die, and the digital logic circuit is formed in a third semiconductor die under the second semiconductor die.
Inventor(s): KOOK TAE KIM of Suwon-si KR for samsung electronics co., ltd., JINGYUN KIM of Suwon-si KR for samsung electronics co., ltd., MINKYUNG LEE of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L27/146
CPC Code(s): H10F39/807
Abstract: an image sensor is provided. the image sensor includes: a plurality of pixels; a semiconductor substrate including a first surface and a second surface opposing the first surface; a device isolation layer provided in a trench penetrating through the first surface and the second surface of the semiconductor substrate, and separating the plurality of pixels from each other; and a microlens provided on the second surface. the device isolation layer includes: a buried insulating pattern penetrating through the first surface and the second surface; an insulating liner between the buried insulating pattern and the semiconductor substrate; a conductive liner between the insulating liner and the buried insulating pattern; and a buried conductive pattern provided on at least a portion of the buried insulating pattern and contacting the conductive liner.
20250126917. IMAGE SENSOR_simplified_abstract_(samsung electronics co., ltd.)
Inventor(s): Jonghoon PARK of Suwon-si KR for samsung electronics co., ltd., Junghyun KIM of Suwon-si KR for samsung electronics co., ltd., Jungchak AHN of Suwon-si KR for samsung electronics co., ltd., Yun Ki LEE of Suwon-si KR for samsung electronics co., ltd., Junsik LEE of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H01L27/146
CPC Code(s): H10F39/807
Abstract: an image sensor includes a semiconductor substrate including a plurality of pixels, a first surface, and a second surface, opposing the first surface, and a device isolation layer in a trench penetrating through the first surface and the second surface of the semiconductor substrate and separating the pixels from each other. the device isolation layer may include a conductive separation layer extending from the first surface to the second surface, an insulating liner interposed between the conductive separation layer and the semiconductor substrate, and a capping separation layer extending in a direction from the second surface to the first surface and contacting the conductive separation layer.
Inventor(s): Ohyun Kwon of Suwon-si KR for samsung electronics co., ltd., Yong Joo Lee of Suwon-si KR for samsung electronics co., ltd., Hongsoo Lee of Suwon-si, Gyeonggi-do KR for samsung electronics co., ltd., Jongwon Choi of Suwon-si KR for samsung electronics co., ltd., Sunghun Hong of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H10K85/30, C07F15/00, C09K11/06, H10K50/12, H10K85/40
CPC Code(s): H10K85/342
Abstract: an organometallic compound represented by formula 1:
Inventor(s): Ohyun Kwon of Suwon-si KR for samsung electronics co., ltd., Yong Joo Lee of Suwon-si KR for samsung electronics co., ltd., Hongsoo Lee of Suwon-si, Gyeonggi-do KR for samsung electronics co., ltd., Jongwon Choi of Suwon-si KR for samsung electronics co., ltd., Sunghun Hong of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H10K85/30, C07F15/00, C09K11/06, H10K50/12, H10K85/40
CPC Code(s): H10K85/342
Abstract:
m(l)(l) formula 1
Inventor(s): Ohyun Kwon of Suwon-si KR for samsung electronics co., ltd., Yong Joo Lee of Suwon-si KR for samsung electronics co., ltd., Hongsoo Lee of Suwon-si, Gyeonggi-do KR for samsung electronics co., ltd., Jongwon Choi of Suwon-si KR for samsung electronics co., ltd., Sunghun Hong of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H10K85/30, C07F15/00, C09K11/06, H10K50/12, H10K85/40
CPC Code(s): H10K85/342
Abstract: wherein, mis a transition metal, lis a ligand represented by formula 1a, lis a ligand represented by formula 1b, and n1 and n2 are each independently 1 or 2,
Inventor(s): Ohyun Kwon of Suwon-si KR for samsung electronics co., ltd., Yong Joo Lee of Suwon-si KR for samsung electronics co., ltd., Hongsoo Lee of Suwon-si, Gyeonggi-do KR for samsung electronics co., ltd., Jongwon Choi of Suwon-si KR for samsung electronics co., ltd., Sunghun Hong of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H10K85/30, C07F15/00, C09K11/06, H10K50/12, H10K85/40
CPC Code(s): H10K85/342
Abstract:
Inventor(s): Ohyun Kwon of Suwon-si KR for samsung electronics co., ltd., Yong Joo Lee of Suwon-si KR for samsung electronics co., ltd., Hongsoo Lee of Suwon-si, Gyeonggi-do KR for samsung electronics co., ltd., Jongwon Choi of Suwon-si KR for samsung electronics co., ltd., Sunghun Hong of Suwon-si KR for samsung electronics co., ltd.
IPC Code(s): H10K85/30, C07F15/00, C09K11/06, H10K50/12, H10K85/40
CPC Code(s): H10K85/342
Abstract: wherein xis c(r), n, or c bonded to y; xis c(r), n, or c bonded to yor y; xis c(r), n, or c bonded to yor y; xis c(r), n, or c bonded to y, wherein i) xis c bonded to y, and xis c bonded to y; ii) xis c bonded to y, and xis c bonded to y; or iii) xis c bonded to y, and xis c bonded to y, and the remaining substituents are as described herein.
Inventor(s): Kwangseok KIM of Suwon-si KR for samsung electronics co., ltd., Kiwoong KIM of Hwaseong-si KR for samsung electronics co., ltd., Seonggeon PARK of Hwaseong-si KR for samsung electronics co., ltd.
IPC Code(s): H10N50/10, G11C11/16, H01F10/32, H10B61/00, H10N50/85
CPC Code(s): H10N50/10
Abstract: a magnetic tunnel junction device and a memory device including the magnetic tunnel junction device are provided. the magnetic tunnel junction device includes a seed layer, a pinned layer on the seed layer, a free layer facing the pinned layer, and a tunnel barrier layer between the pinned layer and the free layer, wherein the seed layer includes a first seed layer and a second seed layer between the first seed layer and the pinned layer, and one of the first seed layer and the second seed layer includes rhenium (re) and the other of the first seed layer and the second seed layer includes ruthenium (ru).
Samsung Electronics Co., Ltd. patent applications on April 17th, 2025
- Samsung Electronics Co., Ltd.
- B23K26/06
- B23K26/067
- B23K26/082
- B23K26/38
- B23K26/70
- B23K101/36
- CPC B23K26/0648
- Samsung electronics co., ltd.
- C01B23/00
- CPC C01B23/0068
- D06F34/28
- D06F33/30
- D06F105/48
- CPC D06F34/28
- D06F37/30
- D06F23/06
- D06F33/36
- D06F33/40
- D06F33/48
- D06F34/16
- D06F37/04
- D06F37/20
- D06F39/08
- D06F103/24
- D06F103/26
- D06F105/08
- D06F105/52
- CPC D06F37/304
- F24C15/00
- F24C7/04
- F24C7/08
- F24C15/32
- F27D21/02
- CPC F24C15/008
- F25B21/02
- CPC F25B21/02
- F25B41/31
- F25B30/02
- CPC F25B41/31
- F25D11/02
- F25D17/04
- F25D23/12
- CPC F25D11/02
- F25D17/06
- F25D17/08
- CPC F25D17/065
- G01N27/413
- G01N27/30
- G01N27/406
- H01M10/42
- CPC G01N27/413
- G01N29/04
- G01N29/24
- CPC G01N29/041
- G01R31/28
- H01L21/66
- CPC G01R31/2877
- G01R31/317
- CPC G01R31/31709
- G01S13/86
- G01N22/04
- G01N27/90
- G01N33/38
- G01S13/88
- CPC G01S13/86
- G02B6/42
- CPC G02B6/4206
- G03B21/14
- G03B5/00
- G06T11/60
- G06V10/25
- CPC G03B21/142
- G03F7/039
- C08F218/00
- C08F220/18
- C08F220/30
- CPC G03F7/039
- C08F212/14
- G03F7/00
- G03F7/038
- CPC G03F7/70758
- G05F1/575
- CPC G05F1/575
- G06F1/16
- H04M1/02
- CPC G06F1/1652
- G06F3/0485
- G06F3/14
- CPC G06F1/1677
- G06F3/01
- G02F1/1333
- G02F1/1335
- G09G3/36
- CPC G06F3/013
- G06F3/0482
- G06F40/169
- CPC G06F3/0482
- G06F3/06
- CPC G06F3/0608
- CPC G06F3/0619
- CPC G06F3/0659
- G11C16/04
- G11C16/10
- G11C16/26
- H03K19/00
- H10B43/27
- G06F3/0354
- G06F3/042
- G06F3/044
- G06F3/147
- H04N23/66
- CPC G06F3/1454
- G06F3/16
- G05D1/229
- G05D107/40
- CPC G06F3/165
- G06F1/3206
- G06F9/451
- G06F3/04886
- G06F9/48
- CPC G06F9/451
- G06F11/10
- CPC G06F11/1044
- G06F11/34
- CPC G06F11/3485
- G06F12/02
- CPC G06F12/023
- G06F13/16
- G06F13/40
- CPC G06F12/0246
- G06F12/0862
- CPC G06F12/0862
- G06F12/1036
- G06F12/0873
- CPC G06F12/1036
- G06F13/42
- CPC G06F13/409
- CPC G06F13/4221
- G06F21/62
- G06T9/20
- CPC G06F21/6245
- G06F30/392
- G06F115/02
- CPC G06F30/392
- G06N3/08
- G06N3/047
- CPC G06N3/08
- G06N20/00
- G01R31/367
- G01R31/389
- G01R31/392
- CPC G06N20/00
- G06T3/08
- G06T7/11
- G06T7/50
- CPC G06T3/08
- G06T3/4046
- G06T3/4007
- CPC G06T3/4046
- G06T7/00
- CPC G06T7/001
- G06F3/04845
- CPC G06T11/60
- G06T13/00
- G06T7/246
- G06V40/20
- H04N5/272
- H04N23/63
- H04N23/667
- CPC G06T13/00
- G09G3/00
- CPC G09G3/001
- G09G3/3283
- G09G3/3291
- CPC G09G3/006
- G09G3/20
- G09G3/3275
- CPC G09G3/2007
- G11C7/22
- G11C7/10
- G11C8/10
- G11C8/18
- G11C29/02
- G11C29/50
- CPC G11C7/222
- G11C11/4091
- G11C11/408
- CPC G11C11/4091
- G11C11/4074
- G11C11/4094
- G11C11/4097
- G11C5/06
- CPC G11C11/4097
- G11C11/412
- G11C11/418
- G11C11/419
- CPC G11C11/412
- G11C16/08
- G11C16/30
- CPC G11C16/08
- H01L23/48
- H10B41/27
- H10B41/35
- H10B41/40
- H10B43/35
- H10B43/40
- CPC G11C16/10
- G11C16/34
- CPC G11C16/102
- G11C29/12
- G11C29/40
- CPC G11C29/12005
- H01L21/311
- H01L21/02
- H01L21/28
- CPC H01L21/31144
- H01L21/67
- CPC H01L21/67034
- H01L21/687
- CPC H01L21/67092
- G05B19/048
- CPC H01L21/67144
- H01L21/673
- CPC H01L21/6732
- H01L21/68
- H01L21/683
- H01L25/075
- H10H20/01
- CPC H01L21/681
- CPC H01L21/68764
- H01L21/78
- B23K101/40
- H01L21/304
- CPC H01L21/78
- H01L23/29
- H01L23/00
- H01L23/31
- CPC H01L23/295
- H01L23/373
- H01L23/498
- H01L25/065
- H01L29/04
- H01L29/36
- CPC H01L23/3738
- H01L23/473
- H01L23/367
- CPC H01L23/473
- H01L21/768
- H10B99/00
- CPC H01L23/481
- H01L23/49
- H01L25/10
- CPC H01L23/49
- H01L23/495
- CPC H01L23/49568
- CPC H01L23/49838
- H01L21/48
- H01L23/522
- H01L23/528
- H01L23/532
- CPC H01L23/5226
- H01L23/64
- H01L25/16
- CPC H01L23/5227
- H01L23/538
- CPC H01L23/5383
- H01L23/552
- H01L21/285
- H01L25/18
- H10B80/00
- CPC H01L23/552
- CPC H01L24/05
- CPC H01L24/08
- CPC H01L24/32
- CPC H01L24/73
- H10B10/00
- H10B12/00
- CPC H01L25/0657
- G02B6/43
- H01L23/13
- H01L27/144
- CPC H01L25/105
- CPC H01L25/167
- H01M50/136
- H01M10/052
- H01M50/119
- CPC H01M50/136
- H01Q1/22
- H01Q19/10
- CPC H01Q1/22
- H01Q21/06
- H01Q1/24
- H01Q1/42
- H05K1/14
- CPC H01Q21/064
- H02M3/158
- H02M1/00
- CPC H02M3/158
- H03M1/00
- H03M1/12
- CPC H03M1/002
- H03M1/68
- CPC H03M1/68
- H04B1/04
- H04L27/36
- CPC H04B1/0475
- H04B17/309
- CPC H04B17/346
- H04L5/00
- H04L25/03
- H04W72/51
- CPC H04L5/0053
- H04L9/08
- G06F21/78
- H04L9/32
- CPC H04L9/0825
- H04L25/02
- CPC H04L25/0272
- H04L27/26
- H04W72/20
- CPC H04L27/26025
- CPC H04L27/263
- CPC H04L27/2636
- H04L47/193
- H04L47/28
- CPC H04L47/193
- H04L9/40
- G06T19/00
- G06T19/20
- G06V20/20
- CPC H04L63/08
- H04L69/22
- H04L45/00
- CPC H04L69/22
- CPC H04M1/0222
- H04M3/51
- H04M3/523
- CPC H04M3/5191
- H04N9/31
- G06T7/55
- G06T7/60
- G06T7/70
- G06T11/00
- CPC H04N9/3185
- CPC H04N9/3194
- H04N19/593
- H04N19/11
- H04N19/132
- H04N19/136
- H04N19/176
- H04N19/82
- CPC H04N19/593
- H04N23/53
- G06T3/40
- CPC H04N23/53
- H04N23/65
- G06T7/80
- CPC H04N23/65
- H04N25/11
- G06T3/4015
- H04N25/704
- H10F39/00
- CPC H04N25/11
- H04R1/10
- CPC H04R1/1083
- H04R3/00
- H04R3/12
- CPC H04R3/002
- H04W8/18
- CPC H04W8/18
- H04W12/02
- H04L67/306
- H04L67/52
- CPC H04W12/02
- H04W28/02
- H04W52/36
- CPC H04W28/0268
- H04W48/08
- H04W48/16
- CPC H04W48/08
- H04W52/02
- H04W24/02
- H04W76/15
- CPC H04W52/0235
- H04W52/42
- CPC H04W52/42
- H04W72/1268
- H04W72/232
- CPC H04W72/1268
- H04W72/25
- H03M13/39
- H04W4/40
- CPC H04W72/25
- H04W72/231
- CPC H04W72/51
- H04W74/04
- CPC H04W74/04
- H04B7/06
- H04W64/00
- H04W84/06
- CPC H04W76/15
- H04W4/80
- H04W76/45
- H04W4/10
- H04W76/10
- CPC H04W76/45
- H04W88/06
- H04W4/44
- H04W76/14
- H04W76/27
- H04W92/18
- CPC H04W88/06
- H05K5/02
- F16C11/04
- CPC H05K5/0226
- CPC H05K5/0295
- CPC H10B12/05
- CPC H10B12/482
- CPC H10B12/485
- CPC H10B43/27
- H10B41/10
- H10B41/41
- H10B43/10
- CPC H10B43/40
- H10B51/30
- G06N3/063
- H01L29/51
- H01L29/78
- CPC H10B51/30
- H10B51/20
- CPC H10B80/00
- H10D1/68
- CPC H10D1/714
- H01L29/786
- H01L29/66
- CPC H10D30/6728
- H01L29/41
- H01L29/417
- H01L29/423
- H01L29/775
- CPC H10D30/6757
- H10D62/10
- H10D30/01
- H10D84/01
- H10D84/03
- H10D84/83
- CPC H10D62/116
- H01L29/08
- H01L27/088
- H01L29/06
- CPC H10D62/151
- H10D62/82
- H10D48/36
- H10D62/80
- H10D62/85
- CPC H10D62/82
- H01L21/762
- H01L27/092
- CPC H10D64/513
- H10B51/10
- CPC H10D64/689
- H10D30/69
- H10D64/00
- CPC H10D84/834
- CPC H10D84/85
- H01L29/24
- H01L29/76
- H10F39/18
- H10F39/15
- CPC H10F39/18
- H04N25/59
- H04N25/60
- H04N25/772
- CPC H10F39/80377
- H01L27/146
- CPC H10F39/807
- H10K85/30
- C07F15/00
- C09K11/06
- H10K50/12
- H10K85/40
- CPC H10K85/342
- H10N50/10
- G11C11/16
- H01F10/32
- H10B61/00
- H10N50/85
- CPC H10N50/10