Samsung Electronics Co., Ltd. patent applications on 2025-07-03
Patent Applications by Samsung Electronics Co., Ltd. on July 3rd, 2025
Samsung Electronics Co., Ltd.: 285 patent applications
Samsung Electronics Co., Ltd. has applied for patents in the areas of H10B43/27 (ELECTRONIC MEMORY DEVICES, 4), G06F3/0619 ({in relation to data integrity, e.g. data losses, bit errors}, 3), H10B12/50 (ELECTRONIC MEMORY DEVICES, 3), H04W48/08 (Access restriction or access information delivery, e.g. discovery data delivery (signalling during connection ), 2), G06F12/0246 ({in block erasable memory, e.g. flash memory}, 2), G05F1/575 (SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES (regulating the timing or recurrence frequency of pulses in radar or radio navigation systems ; regulation of current or voltage, specially adapted for use in electronic time-pieces ; closed-loop systems for regulating non-electric variables by electric means ; regulating power supply of digital computers ; for obtaining desired operating characteristics of electromagnets with armatures ; regulating electric power distribution networks ; regulating the charging of batteries ; regulation of the output of static converters, e.g. switching regulators ; regulation of the output of electric generators , ; controlling transformers, reactors or choke coils ; regulating frequency response, gain, maximum output, amplitude or bandwidth of amplifiers ; regulating tuning of resonant circuits ; regulating characteristics of transmission lines ; controlling electric light sources , , , , ; electric control of X-ray apparatus ), 2), G11C7/1063 (Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers, 2), G11C11/4091 (Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating, 2), H10D62/235 (No explanation available, 2), F24F11/63 (AIR-CONDITIONING; AIR-HUMIDIFICATION; VENTILATION; USE OF AIR CURRENTS FOR SCREENING (removing dirt or fumes from areas where they are produced ; vertical ducts for carrying away waste gases from buildings ; tops for chimneys or ventilating shafts, terminals for flues ), 2)
With keywords such as: includes, method, unit, driving, disclosed, controlling, robot, vacuum, cleaner, particular in patent application abstracts.
Top Inventors:
- Jiwoong IM of Suwon-si KR (1 patents)
- Koeun CHOI of Suwon-si KR (1 patents)
- Sangdok Mo of Suwon-si KR (1 patents)
- Boseok MOON of Suwon-si KR (1 patents)
- Muwoong LEE of Suwon-si KR (1 patents)
Collaborating organizations:
- RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITY (1 patents)
- UNIST (Ulsan National Institute Of Science And Technology) (1 patents)
- Uif (University Industry Foundation), Yonsei University (2 patents)
- SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION (2 patents)
- DAEGU GYEONGBUK INSTITUTE OF SCIENCE AND TECHNOLOGY (1 patents)
Patent Applications by Samsung Electronics Co., Ltd.
20250213089. ROBOT VACUUM CLEANERS CONTROLLING METHOD THEREOF (Samsung Electronics ., .)
Abstract: disclosed are a robot vacuum cleaner and a controlling method of the robot vacuum cleaner. in particular, the robot vacuum cleaner includes a driving unit, memory configured to store at least one instruction, and a processor configured to execute the at least one instruction, in which the processor may be configured to acquire information on a carpet located in a cleaning space, determine a path for the robot vacuum cleaner to clean the carpet based on the information on the carpet, determine, based on the information on the carpet, a first suction force for cleaning a first area corresponding to a center of the carpet and a second suction force for cleaning a second area of the carpet different from the first area, and control the driving unit to operate the robot vacuum cleaner based on the first suction force and the second suction force while moving along the path.
20250213091. ROBOT CLEANER METHOD CONTROLLING THEREOF (Samsung Electronics ., .)
Abstract: a robot cleaner includes: a main body; a driving wheel disposed on the bottom of the main body and configured to move the main body; a mopping device disposed on the bottom of the main body; and a rotation device including: a bridge connected to the mopping device, and a first motor configured to rotate the bridge for the mopping device such that the mopping device is moved to one from among a first position and a second position, wherein the mopping device is disposed on the bottom of the main body based on the mopping device being in the first position, and the mopping device protrudes outward from the main body based on the mopping device being in the second position.
Abstract: an electronic device is provided comprising: a biometric sensor, including at least one light emitting diode (led) and at least one light receiving unit, for acquiring biometric information by means of the at least one light emitting device and the at least one light receiving unit; a power receiving circuit configured to receive a wireless power signal from an external electronic device; and a processor operatively coupled to the biometric sensor and the power receiving circuit. the processor may be configured to receive a designated wireless power signal from the external electronic device by using the power receiving circuit and to perform optical communication with the external electronic device by using the biosensor when the designated wireless power signal is received. other various embodiments identified from the specification are also possible.
Abstract: disclosed is a wearable device. a wearable device may include a driving module, a first frame corresponding to a portion of a lower body of a user, an angle sensor configured to sense an angle of the first frame and obtain a first frame angle value, a lumbar support module connected to the driving module and positioned on a lower back area of the user, an inertial measurement unit (imu) sensor, and a processor(s). the processor(s) may be configured to obtain the first frame angle value using the angle sensor, obtain a first rotation angle value of the lumbar support module using the imu sensor, determine whether a sitting posture of the user is an abnormal sitting posture based on the first rotation angle value and the first frame angle value, and control the driving module such that the driving module generates a first torque when determining that the sitting posture is the abnormal sitting posture.
20250213180. ELECTRONIC DEVICE CONTROLLING METHOD ELECTRONIC DEVICE (Samsung Electronics ., .)
Abstract: an electronic device is provided. the electronic device includes a microphone, memory storing one or more computer programs, and one or more processors communicatively coupled to the microphone, and the memory, wherein the one or more computer programs include computer-executable instructions that, when executed by the one or more processors individually or collectively, cause the electronic device to store registration information on breathing sounds of a plurality of users in the memory, based on receiving an audio signal through the microphone, obtain information on a breathing sound of a user based on the audio signal, compare the information on the breathing sound with the registration information, identify at least one user corresponding to the information on the breathing sound among the plurality of users, and based on identifying the at least one user, obtain an analysis result for the sleeping states of each of the at least one user based on information corresponding to each of the at least one user in the information on the breathing sound.
Abstract: an electronic device is provided. the electronic device includes a ring-shaped housing having an inner surface into which a finger of a user is inserted, a light-emitting unit configured to emit a light to the inner surface of the housing through a first region of the inner surface of the housing within the housing, a light-receiving unit configured to receive first light, which is a portion of the light reflected from an inside of the finger of the user, through a second region of the inner surface of the housing within the housing, and a coating layer, disposed between the first region and the second region, configured to reflect second light, which is distinct from the first light and is remaining portion of the light, to the finger of the user to transmit the second light to the light-receiving unit.
Abstract: a control method for reducing power consumption of a wearable device, and/or a wearable device performing the same. the wearable device may include: a driving module that uses a motor and a motor driver circuit to generate torque applied to a user's body; a waist support frame for supporting the user's body when the wearable device is worn on the user's body; a leg driving frame for transmitting the torque generated by a driving module to the user's body; a back electromotive force control circuit for monitoring a back electromotive force that may be generated by the operation of the motor, and for limiting the voltage level of the back electromotive force below a reference level; and a processor for controlling the operation of the driving module and controlling supply of power to the back electromotive force control circuit.
Abstract: a ceramic catalytic filter includes a ceramic support, and a catalyst coating layer directly disposed on the ceramic support through a one-pot reaction. the catalyst coating layer includes a nanostructure.
Abstract: disclosed are substrate cleaning heads, substrate cleaning modules, substrate cleaning systems, and substrate processing methods. the substrate cleaning head comprises a support body having a vertical axis, and a plurality of brushes at a bottom surface of the support body, wherein the brushes of the plurality of brushes are arranged in a circumferential direction about the vertical axis of the support body. the brushes of the plurality of brushes are each spaced apart from one another in the circumferential direction. each of the brushes includes a brush body that extends in the circumferential direction from a first side surface to a second side surface opposing the first side surface, and an inclination portion extending inward from an inner lateral extent of the brush body. a thickness of the inclination portion decreases in an inward direction. an inclined surface as a bottom surface of the inclination portion forms an acute angle with the vertical axis.
Abstract: a solder composition includes a solder paste including a tin (sn)-bismuth (bi) alloy and/or a tin (sn)-silver (ag)-copper (cu) alloy and a plurality of nanoparticles dispersed in the solder paste, wherein each of the nanoparticles includes a core that is spherical, the core includes a metal oxide, and the metal oxide has a density of 7 g/cmor more and a melting point of 2000� c. or higher.
20250214192. SEMICONDUCTOR SUBSTRATE GRINDING APPARATUS (Samsung Electronics ., .)
Abstract: an example semiconductor substrate polishing apparatus includes a polishing table, a wafer carrier, and a slurry supplier. the polishing table includes a polishing pad. the wafer carrier is disposed on the polishing table and is configured to attach a substrate. the slurry supplier is disposed on the polishing table and is configured to contain a slurry composition. the polishing pad includes a first polymer region defined by first polymers and a plurality of second polymer regions defined by second polymers, adjacent to each other, and arranged within the first polymer region.
Abstract: a substrate polishing module according to at least one embodiment includes a pair of ring-shaped platens disposed along the circumference of the substrate, respectively on the upper and lower portions of the substrate, a polishing pad disposed on each platen of the pair of platens and in contact with the upper and lower surfaces of the substrate to polish a bevel of the substrate, and a driver that rotates each of the platens.
Abstract: a substrate processing apparatus includes a platen that supports a polishing pad and rotates about a first axis extending in a first direction, a polishing head supporting a substrate and disposed on the platen, and a slurry arm capable of supplying slurry onto the platen, wherein the slurry arm includes a slurry arm body disposed on the platen and extending in a second direction perpendicular to the first direction, a steam bar combined with the slurry arm body and capable of spraying water vapor, and a steam bar power supply capable of applying a voltage to the steam bar such that the steam bar has an electric charge, and the steam bar includes a steam nozzle spraying the water vapor and extending to the platen.
20250214388. DRIVING ROBOT SUSPENSION STRUCTURE (Samsung Electronics ., .)
Abstract: a driving robot may be provided and include: a base; a first driving wheel on a left side of the base; a second driving wheel on a right side of the base; and a plurality of caster units at a front and rear of the first driving wheel and a front and rear of the second driving wheel, respectively. each of the plurality of caster units may include: a caster; and an air suspension configured to dampen the caster so as to be liftable by pneumatic pressure, and wherein the air suspension of a first caster unit among the plurality of caster units is connected to the air suspension of a second caster unit among the plurality of caster units by a single flow path.
Abstract: a solid electrolyte precursor, a solid electrolyte, and a method of preparing the solid electrolyte. the solid electrolyte precursor includes a compound represented by formula 1 and has an amorphous phase and the amorphous phase is contained in an amount of at least 50 volume percent based on the total volume of the solid electrolyte precursor. when the solid electrolyte precursor is analyzed by x-ray diffraction using cu k� radiation at a diffraction angle of 10� 2� to 90� 2�, a proportion of an area pof peaks having a full width at half maximum of 0.01� to 0.5� to a total area pof all peaks is 10% or less:
Abstract: an organometallic compound represented by formula 1:
Abstract: provided are a slurry composition for chemical mechanical polishing including an abrasive including dendrimer particles surface-treated with metal oxide, a method of preparing same, and a chemical mechanical polishing method of a wafer.
Abstract: an organometallic compound represented by formula 1:
Abstract: provided are an etching composition including a hypervalent iodine-containing compound, a method of etching a metal-containing layer by using the same, and a method of manufacturing a semiconductor device by using the same.
20250215628. CLOTHES TREATING APPARATUS METHOD CONTROLLING SAME (Samsung Electronics ., .)
Abstract: disclosed is a clothes treating apparatus comprising: a drying device including a heat exchanger, a compressor and a fan and having a drain hole formed to drain condensate water produced by the heat exchanger; a tub arranged underneath the drying device and storing the condensate water drained through the drain hole; a water level sensor configured to detect a water level in the tub; and a controller configured to start a drying process, operate the drying device based on the start of the drying process, and determine a load for drying to be one of no-load and a small load based on the water level in the tub failing to reach a preset water level while a preset time elapses after the start of the drying process.
20250215631. CLOTHES TREATING APPARATUS (Samsung Electronics ., .)
Abstract: the present disclosure relates to a clothes treating apparatus including a tub, a front frame disposed in front of the tub and having a laundry inlet and an opening formed above the laundry inlet, a reinforcing bracket coupled to the front frame between the laundry inlet and the opening to reinforce a strength of the front frame, a control panel provided at a position corresponding to the opening of the front frame, and a guide panel configured to fix the control panel and coupled to the front frame and the reinforcing bracket.
20250215633. WASHING MACHINE COMPRISING DETERGENT SUPPLY DEVICE (Samsung Electronics ., .)
Abstract: a washing machine comprises a housing, a tub, which is disposed in the housing, a detergent supply device, which includes a detergent container to accommodate detergent and a discharge pump to discharge the detergent, a circulating pipe structure of which one end and another end are coupled to the tub so as to fluidically communicate therewith, and a circulating pump to generate a water flow in one direction within the circulating pipe structure. the circulating pipe structure includes a mixing portion having a mixing pipe coupled to the discharge pump so as to fluidically communicate therewith. the water flow from the lower portion of the mixing pipe toward the upper portion of the mixing pipe.
20250216085. COOKING APPARATUS (Samsung Electronics ., .)
Abstract: a cooking apparatus includes a main body including a cooking chamber, a door mounted on the main body to open or close the cooking chamber and including an inner glass and an outer glass, a camera bracket attached to the outer glass between the outer glass and the inner glass, a camera holder detachably mounted to the camera bracket, a camera mounted on the camera holder to capture an inside of the cooking chamber, a first polarizing member on the outer glass, the first polarizing member configured to transmit light oscillating in a first direction, and a second polarizing member on a side of the camera facing the cooking chamber, the second polarizing member configured to absorb or reflect the light oscillating in the first direction transmitted by the first polarizing member and reflected by the inner glass.
20250216086. COOKING APPARATUS (Samsung Electronics ., .)
Abstract: a cooking apparatus may include: a door to open and close a chamber and including a locking portion, a latch movable between a first latch position in which the latch is engaged with the locking portion and a second latch position in which the latch is disengaged from the locking portion, a slider movable between a first and second slider position corresponding to the first and second latch position, and a pusher movable to a first pusher position of releasing the pressing of the slider or a second pusher position of pressing the slider. the pusher may move the slider from the first slider position to the second slider position with the pusher moved from the first pusher position to the second pusher position. the slider may be movable between the first slider position and the second slider position with the pusher located at the first pusher position.
20250216094. CLIP MEMBER INSTALLATION STRUCTURE INCLUDING SAME (Samsung Electronics ., .)
Abstract: an installation structure for a ceiling-mounted indoor unit includes: a supporting member including an end portion fixed to a ceiling wall and configured to pass through a hanger bar connected to the indoor unit; and a clip member including: a body including a penetration portion in which the supporting member is configured to pass through, an extension extending along a length of the supporting member from the body, and an engaging portion extending from an end portion of the extension and configured to be locked to the hanger bar.
Abstract: an electronic apparatus is provided. the electronic apparatus according to an embodiment includes: a communication interface, comprising communication circuitry, configured to perform communication with an air conditioner, an input interface, comprising input circuitry, a memory storing at least one instruction and a preferred temperature range, and at least one processor, comprising processing circuitry, individually and/or collectively, configured to execute the at least one instruction, and to: control the communication interface to receive information about an operation mode of the air conditioner from the air conditioner, and based on the operation mode of the air conditioner being a normal mode, determine a set temperature input through the input interface as a target temperature, based on the operation mode of the air conditioner being a power saving mode, determine a target temperature having a specified temperature difference from the set temperature based on the set temperature and the stored preferred temperature range, and control the communication interface to transmit the determined target temperature to the air conditioner.
20250216107. AIR CONDITIONER CONTROLLING METHOD THEREFOR (Samsung Electronics ., .)
Abstract: an air conditioner which comprises: a temperature sensor; and a processor that obtains, based on receiving a turn-on command for the air conditioner, a first temperature value sensed through the temperature sensor; based on a threshold time elapsing subsequent to the receiving of the turn-on command, obtains a second temperature value sensed through the temperature sensor; and provides notification information related to an environment in which the air conditioner is installed, on the basis of the first temperature value and the second temperature value.
20250216108. METHOD MANAGING AIR CONDITIONER AIR CONDITIONER (Samsung Electronics ., .)
Abstract: a method of managing an air conditioner for performing a cooling operation and a dry operation includes receiving a user command to set at least one of a target operation time of a fan of the air conditioner and a target rotation speed of the fan to control the dry operation; and performing the dry operation by operating the fan at the set target rotation speed of the fan according to the user command for the set target operation time of the fan according to the user command.
20250216109. ELECTRONIC DEVICE METHOD CONTROLLING SAME (Samsung Electronics ., .)
Abstract: an electronic device and a method for controlling same. the electronic device comprises a communication interface; a memory; and one or more processors. the one or more processors receive temperature and humidity information and operation history of a plurality of peripheral devices through a communication interface; based on a driving signal of a target device is received through the communication interface, input the temperature and humidity information and the information about the operation history of the plurality of peripheral devices into a humidity prediction model and identify a vector value output from the humidity prediction model; identify humidity prediction information for a space in which the target device is located on the basis of the identified vector value; and transmit driving information, according to which the target device is to be operated based on the driving signal, corresponding to the identified humidity prediction information to the target device.
20250216111. AIR CONDITIONER METHOD CONTROLLING SAME (Samsung Electronics ., .)
Abstract: an air conditioner includes: a housing including a plurality of outlets; a heat exchanger disposed in the housing; a compressor connected to the heat exchanger and configured to circulate a refrigerant to allow the refrigerant to pass through the heat exchanger; a plurality of fans configured to blow air to allow the air to pass through the heat exchanger and be discharged to the plurality of outlets; and a controller including at least one processor, comprising processing circuitry, individually and/or collectively, configured to turn on all of the plurality of fans and sequentially turn off the plurality of fans after a cooling operation ends to perform an automatic drying operation.
20250216113. AIR CONDITIONER CONTROL METHOD THEREOF (Samsung Electronics ., .)
Abstract: an air conditioner comprises: an evaporator; a condenser; a base disposed under the evaporator; a scattering wheel configured to scatter water stored in the base toward the condenser; a wheel motor configured to rotate the scattering wheel; an outdoor fan configured to blow outdoor air into the condenser; a fan motor configured to rotate the outdoor fan; a water level sensor configured to detect a water level of the water stored in the base; and a controller, comprising processing circuitry, individually and/or collectively, configured to rotate the wheel motor and the fan motor based on termination of an operation of the air conditioner and a detection result of the water level sensor.
20250216139. REFRIGERATOR (Samsung Electronics ., .)
Abstract: a refrigerator may include: an ice tray configured to form ice; and a tray frame including a frame body to support the ice tray and a terminal connected to the frame body. the frame body may include a heat-generating material. the tray frame may be configured so that, with the ice tray supported by the frame body, a voltage is appliable to the terminal to generate a current flow through the heat-generating material so that the heat-generating material generates heat that is transferred by the frame body to the ice tray to heat the ice tray.
20250216144. COOLING APPARATUS OPERATING METHOD THEREOF (Samsung Electronics ., .)
Abstract: a cooling apparatus including an evaporator through which a refrigerant moves to absorb heat from a cooling target fluid that is a fluid to be cooled, wherein the evaporator includes a first evaporator module, a second evaporator module, a surface heating element extending along a plane perpendicular to a first direction and arranged between the first evaporator module and the second evaporator module, and a sensor module including a voltage electrode arranged between the first evaporator module and the second evaporator module and a ground electrode arranged to be spaced apart from the voltage electrode with any one of the first evaporator module and the second evaporator module between the ground electrode and the voltage electrode.
20250216159. HEAT EXCHANGER (Samsung Electronics ., .)
Abstract: a heat exchanger including a plurality of refrigerant tubes provided to allow refrigerant to flow; and a header coupled to ends of the plurality of refrigerant tubes. the header may include a header housing disposed on one side of the plurality of refrigerant tubes; an inlet pipe that penetrates the header housing to be connected to one of the plurality of refrigerant tubes, and forms a flow path through which refrigerant is introduced into the refrigerant tube; and a plurality of distribution baffles that are disposed inside the header housing, so that the refrigerant introduced into the refrigerant tube from the inlet pipe flows out from the refrigerant tube and is distributed in both directions inside the header housing.
20250216186. ELECTRONIC DEVICE COMPRISING ELECTROMAGNETIC SENSOR (Samsung Electronics ., .)
Abstract: an electronic device includes: a housing including a first housing and a second housing, which rotates with respect to the first housing around a folding shaft; an electromagnetic member which is arranged in one of the first housing and the second housing, and generates an electromagnetic field; an electromagnetic sensor which is arranged in the other one of the first housing and the second housing, and detects the electromagnetic field; and a hinge structure which is arranged inside the housing to provide the folding shaft, and rotatably couples the first housing and the second housing. the hinge structure includes: a first hinge plate which is arranged in the first housing, and includes a first portion for transmitting the electromagnetic field; and a second hinge plate which is arranged in the second housing, is rotatably coupled to the first hinge plate, and includes a second portion for transmitting the electromagnetic field.
20250216220. METHODS SYSTEMS DETERMINING STEP COUNT USER (Samsung Electronics ., .)
Abstract: a method includes: determining a motion pattern of a user after an initiation of a walking activity; detecting one or more false steps and a gait abnormality associated with the user, based on the motion pattern; detecting an arm swing angle of the user and a leg swing angle of the user, based on the motion pattern and the walking activity; estimating a first variation in the arm swing angle and a second variation in the leg swing angle in the walking activity; calculating, using a machine learning (ml) model of a plurality of ml models, a compensation value associated with the one or more false steps, based on a combination of the first variation and the second variation, and a height of the user; and determining a step count of the user, based on the calculated compensation value and an initial step count of the user.
20250216266. THERMAL IMAGE SENSOR METHOD MANUFACTURING SAME (Samsung Electronics ., .)
Abstract: a thermal image sensor and a method of manufacturing the same are provided. a row electrode and a column electrode are formed on a substrate. a multi-layer stack includes a sensing layer, a first sensing electrode and a second sensing electrode which are in contact with the sensing layer with a channel formed between the first sensing electrode and the second sensing electrode, an absorbing electrode connected to the first sensing electrode, an insulating layer configured to insulate the absorbing electrode from the second sensing electrode and the sensing layer, and a protecting layer configured to cover an exterior. supports are configured to allow the multi-layer stack to float with respect to the substrate. a first intervening electrode and a second intervening electrode are configured to connect the low electrode and the column electrode to the first sensing electrode and the second sensing electrode through the supports.
Abstract: a semiconductor manufacturing process measurement system and a semiconductor manufacturing process measurement method are provided. the semiconductor manufacturing process measurement system includes a memory; and a processor configured to execute a program stored in the memory, wherein the program is configured to be executed by the processor to cause the semiconductor manufacturing process measurement system: collect data from a semiconductor manufacturing apparatus; preprocess the data in consideration of characteristics of the semiconductor manufacturing apparatus; acquire an estimated measurement value using dnn (deep neural network); and detect a trend of the estimated measurement value over time, and determine a contribution of the data based on the trend.
Abstract: provided is an x-ray photoelectron spectroscopy (xps) apparatus including a filament configured to emit an electron beam, an anode including metal patterns, an anode actuator configured to move the anode, a stage configured to support an object and a test pad, a capillary configured to emit multicolored x-rays, generated by collision of the electron beam with the anode, onto the object or the test pad, and a detector configured to detect photoelectrons emitted from the object or the test pad emitted by the multicolored x-rays.
Abstract: an operating method of a representative frequency determination device determining a plurality of representative frequencies used by a communication device to estimate total emission power from an antenna array may be provided. the method may comprise generating, based on a first sample communication device corresponding to the communication device, an ideal correction value table including a plurality of ideal correction values respectively corresponding to a plurality of frequencies, and determining the plurality of representative frequencies such that errors of a plurality of interpolation correction values for the plurality of ideal correction values to be less than a first threshold error, wherein the plurality of interpolation correction values are generated by interpolating a first plurality of ideal correction values, among the plurality of ideal correction values, corresponding to the plurality of representative frequencies.
20250216446. BUILT-IN SELF-TEST CIRCUIT SYSTEM CHIP INCLUDING SAME (Samsung Electronics ., .)
Abstract: a system-on-chip (soc) includes a monitoring circuit configured to determine whether a monitoring voltage has a value between a first reference voltage and a second reference voltage using a first supply voltage and a second supply voltage, and a built-in self-test (bist) circuit configured to, in response to an enable signal, determine whether the monitoring circuit is operating normally. the bist circuit may include a first test circuit configured to determine whether the first supply voltage has a value within a predetermined first supply range using the second supply voltage, a second test circuit configured to determine whether the first reference voltage has a value within a predetermined first reference range, and a third test circuit configured to determine whether the monitoring circuit compares a magnitude of the monitoring voltage with a magnitude of a first determination voltage having a value within a predetermined first comparison range from the first reference voltage.
20250216448. SEMICONDUCTOR TEST APPARATUS (Samsung Electronics ., .)
Abstract: a semiconductor test apparatus includes a tray housing including a loading stacker, a first unloading stacker, and a second unloading stacker, the loading stacker configured to receive a plurality of semiconductor chips for testing, the first unloading stacker configured to receive any defective semiconductor chip among the plurality of semiconductor chips, and the second unloading stacker configured to receive any good semiconductor chip among the plurality of semiconductor chips, a loader configured to place, on a loading set plate, the plurality of semiconductor chips for testing, and load the plurality of semiconductor chips for testing onto a test tray, and a test device configured to test the plurality of semiconductor chips for testing stacked on the test tray.
Abstract: provided is a test device performing a test operation on a latch circuit which includes a plurality of latches. the test device includes a counter configured to output test data to a test target latch, selected from among the plurality of latches, in response to a clock signal and increase a value of the test data in response to the clock signal; a comparison circuit configured to receive, as a first input, the test data outputted from the counter, receive, as a second input, test data outputted from the test target latch, and output a comparison signal by comparing the first input with the second input; and a determination circuit configured to generate a defect determination value indicating whether the latch circuit has a defect, based on the comparison signal.
20250216515. LiDAR APPARATUS (Samsung Electronics ., .)
Abstract: provided is a light detection and ranging (lidar) apparatus. the lidar apparatus includes a plurality of waveguides extending in a first direction and spaced apart from one another in a second direction crossing the first direction, a plurality of light sources spaced apart from one another in the second direction and having a first end optically connected to the plurality of waveguides respectively, a plurality of light switching elements that are two-dimensionally arranged, and having a plurality of first light switching elements optically connected to a first waveguide among the plurality of waveguides, a plurality of light input/output elements optically connected to the plurality of light switching elements, respectively, and a light steering element configured to steer incident light based on a position of incident light on the light steering element. the plurality of light input/output elements configured to input/output light in a third direction.
Abstract: a detection device extracts a plurality of range profiles from a radar signal detected during a time period from a target; determines obtain magnitude variance data defined with respect to a plurality of magnitude components corresponding to a target index in the plurality of range profiles, phase variance data defined with respect to a plurality of phase components corresponding to the target index, scatter plot data defined with respect to a plurality of in-phase quadrature (iq) components corresponding to the target index, and spectrogram data defined with respect to the target index and a plurality of adjacent indices adjacent to the target index; and inputs the magnitude variance data, the phase variance data, the scatter plot data, and the spectrogram data into an artificial intelligence (ai) model to detect a type of the target.
Abstract: provided are systems, methods, and apparatuses for phase modulating thin film for long-wave infrared thermal imaging. in one or more examples, the systems, devices, and methods include forming a first thin film layer of a first metalens of the metalens array and forming a nanostructure in the first thin film layer. in some examples, the systems, devices, and methods include forming at least one thin film layer of a second metalens of the metalens array, integrating the first metalens on a first pixel of a pixel array of the thermal camera, the first metalens being positioned over at least a portion of the first pixel, and integrating the second metalens on a second pixel of the pixel array, the second metalens being positioned over at least a portion of the second pixel.
20250216625. SEMICONDUCTOR PACKAGE (Samsung Electronics ., .)
Abstract: a semiconductor package includes a first semiconductor chip, a plurality of second semiconductor chips stacked on the first semiconductor chip, a first molding layer on the first semiconductor chip and surrounding side surfaces of the plurality of second semiconductor chips, a photonic integrated circuit (pic) chip on an uppermost second semiconductor chip among the plurality of second semiconductor chips, and an electronic integrated circuit (eic) chip on the pic chip, wherein an upper surface of the first molding layer is coplanar with an upper surface of the uppermost second semiconductor chip.
20250216653. OPTICAL SYSTEM ELECTRONIC DEVICE DEBLURRING (Samsung Electronics ., .)
Abstract: an optical system includes a lens assembly comprising a plurality of lenses, and an image sensor configured to sense light passing through the lens assembly, wherein, for a point light source positioned in a central zone of a field of view (fov), a full width at half maximum (fwhm) of a point spread function (psf) of the optical system is greater than an fwhm of a psf of a reference system, wherein the reference system comprises a same number of lenses as the plurality of lenses and another image sensor and is configured to optimize a modulation transfer function (mtf), and wherein, for a point light source positioned in an edge zone of the fov, the fwhm of the psf of the optical system is smaller than the fwhm of the psf of the reference system.
20250216683. WEARABLE DEVICE GUIDING USER'S POSTURE METHOD THEREOF (Samsung Electronics ., .)
Abstract: a wearable device is provided. the wearable device includes a sensor, a camera, a display, memory storing one or more computer programs, and one or more processors communicatively coupled to the sensor, the camera, the display, and the memory, wherein the one or more computer programs include computer-executable instructions that, when executed by the one or more processors individually or collectively, cause the wearable device to obtain, in a state that the wearable device is worn by a user, an image using the camera, in the state, identify a posture of the user based on data of the sensor, based on identifying the posture of the user, which is a first preset posture, obtain a first visual object corresponding to an external object using the camera, and display a second visual object for guiding changing of the posture within a field-of-view (fov), based on identifying that the posture of the user is changed from the first preset posture to a second preset posture, display the obtained first visual object in an area including a center of the fov.
Abstract: a wafer processing apparatus includes a laser apparatus configured to generate and irradiate a laser beam, a beam shaper configured to shape a waveform of the laser beam, and a beam compressor configured to locally compress the shaped laser beam, wherein the compressed laser beam is input to a wafer.
20250216694. DISPLAY APPARATUS (Samsung Electronics ., .)
Abstract: a display apparatus includes: a light source module configured to irradiate light; a first substrate disposed in front of the light source module and configured to transmit the light; a second substrate facing the first substrate and configured to transmit the light irradiated by the light source module; and a switching layer between the first substrate and the second substrate and including: a first surface having a first electrode; a second surface having a second electrode facing the first surface; and a switching cell, arranged between the first surface and the second surface and including movable charged particles having of a light-blocking material, configured to transmit or block the light based on an electric potential difference applied to the first electrode and the second electrode. the switching cell has a shape with a decreasing width in an extending direction of the first surface from the second surface toward the first surface.
20250216720. DISPLAY APPARATUS (Samsung Electronics ., .)
Abstract: a display apparatus includes: a display panel; a rear chassis configured to support the display panel; and a light source module positioned on the rear chassis. the light source module includes: a light source configured to emit light periodically by power of a power source periodically applied so as to adjust an intensity of the light, a light source board electrically connectable with the light source, the light source board configured to be periodically moved at least partially closer to the rear chassis based on the power of the power source periodically applied to the light source, and a sound-absorbing layer positioned on the light source board so as to reduce noise caused by the light source board and the rear chassis.
20250216744. CAMERA MODULE INCLUDING APERTURE (Samsung Electronics ., .)
Abstract: a camera module is provided. the camera module includes a lens assembly, a blade set disposed on an upper surface of the lens assembly and adjusting a diameter of a lens incident hole, a rotational drive part connected to the blade set and controlling movement of blades through a rotary motion, a blade connecting part connected to one side of the rotational drive part and rotating the rotational drive part, a linear moving part connected to the blade connecting part and accommodating a blade drive magnet on its outer side and a blade drive coil disposed opposite to the blade drive magnet, wherein in accordance with a current applied to the blade drive coil, the camera module adjusts a diameter of the lens incident hole by linearly moving the linear moving part within a blade drive aperture, which is disposed on a first side of a side frame.
Abstract: a method of configuring an extreme ultraviolet (euv) system may include measuring a phase of an euv mask, correcting a wavefront based on the phase of the euv mask, optimizing a cost function, and configuring an euv illumination system with a combination of euv light sources based on the optimized cost function.
20250216795. METHOD USING LITHOGRAPHY APPARATUS (Samsung Electronics ., .)
Abstract: a lithography method may include placing a patterning device and a substrate in a lithography apparatus, irradiating a first region of the substrate with a diffraction light and increasing an optical path difference (opd) of the diffraction light on the first region. the diffraction light may include first and second diffraction lights, and the opd may be a difference in optical path between the first and second diffraction lights. the lithography apparatus may include an illumination source part configured to emit a radiation beam that is used as the diffraction light, a substrate table supporting the substrate, a supporting structure supporting the patterning device and optically connected to the illumination source part, and a projection part optically connected to the supporting structure and configured to irradiate the substrate with the first and second diffraction lights. the illumination source part may include a monopole source.
20250216799. RETICLE STAGE (Samsung Electronics ., .)
Abstract: provided is a reticle stage including a main base, an electrostatic chuck connected to the main base, a first surface of the electrostatic chuck being configured to support a reticle, a safety bar rotatably on the main base or electrostatic chuck, and a support member on the safety bar, an end of the support member overlapping with an edge of the reticle in a vertical direction, wherein the support member includes a plate portion on a first surface of the safety bar, and a support portion extending from the plate portion and configured to surface contact the reticle based on the reticle falling from the electrostatic chuck.
20250216802. SUBSTRATE PROCESSING APPARATUS (Samsung Electronics ., .)
Abstract: a substrate processing apparatus includes a table in an exposure chamber that is configured to perform an exposure process on a semiconductor substrate, a guiding device including a first horizontal driving body slidably movable in a first horizontal direction and a guide rail on the first horizontal driving body and having a trench extending in a second horizontal direction, a positioning device connected to the guiding device, the positioning device including a slider, a second horizontal driving body and a substrate stage, the slider configured to slidably move in the second horizontal direction along the trench, the second horizontal driving body connected or fixed to the slider, the substrate stage on the second horizontal driving body and configured to support the semiconductor substrate, and a blocking member between the guide rail and the substrate stage to block an inflow of foreign substances onto the substrate stage.
Abstract: disclosed are mass flow controllers of a substrate processing apparatus, flow control methods the substrate processing apparatus, and substrate processing methods. the flow control method comprises receiving a mode selection signal, controlling a flow control valve under a first mode to allow a flow rate of fluid to change by a first flow rate, and controlling the flow control valve under a second mode to allow the flow rate of fluid to change by a second flow rate. the step of controlling the flow control valve under the first mode includes applying a first voltage to a first piezoelectric stack assembly of a piezoelectric actuator connected to the flow control valve. the step of controlling the flow control valve under the second mode includes applying a second voltage to a second piezoelectric stack assembly disposed on the first piezoelectric stack assembly. the second voltage is different from the first voltage.
Abstract: an electronic device includes a voltage regulator configured to generate an output voltage through an output node by converting an input voltage, a load device configured to operate based on the output voltage as a power supply voltage, an output capacitor connected to the output node and having a fixed capacitance, a capacitance controller configured to generate a plurality of capacitance control signals based on a state signal indicating an operation state of the electronic device, and a variable capacitance circuit connected to the output node and having a capacitance that changes based on the plurality of capacitance control signals. abnormal operations may be prevented and performance of the electronic device including the voltage regulator may be enhanced by changing the capacitance of the output node of the voltage regulator depending on the operation state of the electronic device using the variable capacitance circuit.
20250216880. ELECTRONIC DEVICES POWER MANAGEMENT (Samsung Electronics ., .)
Abstract: an electronic device includes a first power management device configured to receive an input voltage, and output first voltages based on the input voltage, and at least one consumer which is configured to receive the first voltages from the first power management device, and operate based on the first voltages. the first power management device includes a switching regulator configured to generate a converted voltage from the input voltage, a first ldo regulator which is configured to generate a first output voltage from a first drop voltage generated by the converted voltage passed through a first pdn, a second ldo regulator and pdn, and a switching regulator which is configured to estimate a first dropout voltage of the first ldo regulator, calculate a voltage drop caused by the first pdn, and dynamically control the converted voltage based on estimated dropout voltages and calculated voltage drops caused by the pdns.
20250216881. LINEAR REGULATOR ELECTRONIC DEVICE INCLUDING SAME (Samsung Electronics ., .)
Abstract: a linear regulator includes a compensation circuit, an adaptive gain control circuit, a buffer circuit, a driver circuit and a feedback circuit. the compensation circuit generates a compensation voltage based on a feedback voltage. a voltage level of the compensation voltage is changed based on a load current that is generated by an output voltage and flows through an output terminal. the adaptive gain control circuit tracks the load current based on the compensation voltage, and generates a first driving voltage by adjusting a loop gain based on an amount of the load current. the buffer circuit generates a second driving voltage by buffering the first driving voltage. the driver circuit is connected to the output terminal, and generates the output voltage based on the second driving voltage. the feedback circuit is connected to the output terminal, and generates the feedback voltage based on the output voltage.
20250216885. METHOD APPRATUS VARIABLE PARAMETER EXPRESSION (Samsung Electronics ., .)
Abstract: disclosed are a method of expressing a parameter variably and an apparatus for the same. a neural processor apparatus includes: a comparator configured to read a value of a fixed-length exponent of a previously-converted parameter value and obtain mantissa-length information of a mantissa, wherein the mantissa-length information is obtained from a mapping table based on being mapped to the value of the exponent; a shifter configured to read the mantissa of the previously-converted parameter value and use the mantissa-length information to convert a structure of the previously-converted parameter value; and the mapping table, in which the mantissa-length information of the mantissa is mapped to the value of the exponent.
Abstract: an electronic device may comprise: a first housing, a second housing, a display, a connection structure comprising an electrically conductive material, and at least one processor, comprising processing circuitry. the connection structure may be configured to electrically connect a second conductive portion of the first housing to a third conductive portion of the second housing. the connection structure may be electrically connected to a fourth conductive portion of the second housing. the connection structure may be configured as a path of a first signal provided from at least one processor to the fourth conductive portion and/or a path of a second signal provided from the fourth conductive portion to at least one processor.
Abstract: an electronic device includes: a first housing including a first substrate and a first partition wall facing a portion of the first substrate and including a first insertion hole; a second housing including a second substrate and a second partition wall facing a portion of the second substrate and including a second insertion hole, the second housing being slidably coupled to the first housing; a flexible display supported by the first housing and the second housing, and including a display area configured to be contracted or expanded; a bendable connecting member including a first end passing through the first insertion hole and connected to the first substrate and a second end passing through the second insertion hole and connected to the second substrate; a first bracket in the first housing and facing the first insertion hole; and a first waterproof member between the first partition wall and the first bracket.
Abstract: an electronic device displays, in an unfolded state of the electronic device, a screen on a flexible display, based on data detected by one or more sensors. the unfolded state is distinguished by an angle between a first side and a second side of a foldable housing in which the flexible display is disposed. a visual object is displayed for selecting at least a portion of the screen to be displayed on a cover display, in a sub-folded state of the electronic device that is switched from the unfolded state, based on the data. an input selecting at least a portion of the screen is received based on the visual object. in the sub-folded state, within the cover display, the at least a portion of the screen selected by the input is displayed, in response to an input identified based on the received input.
Abstract: in accordance with an aspect of the disclosure, a wearable device is provided. the wearable device includes a first camera, a second camera, a display, memory storing one or more computer programs; and one or more processors communicatively coupled to the first camera, the second camera, the display, and the memory, wherein the one or more computer programs include computer-executable instructions that, when executed by the at one or more processors individually or collectively, cause the wearable device to display, using the display, a visual object within a field of view (fov) of a user in a state where the wearable device is worn by the user, while displaying the visual object, based on the first camera disposed toward the fov, identify an external object, interacting with the visual object, seen through the fov, obtain a position of the external object, based on identifying an interaction between the external object and the visual object using the first camera, and change information indicating a direction of eyes, identified by frames outputted from the second camera disposed toward the eyes of the user, using at least one of a position of the visual object or the position of the external object, based on obtaining the position of the external object.
Abstract: disclosed is an electronic device including a display. the electronic device, based on identifying a selection of a screen recording function while displaying a plurality of windows displaying execution of a plurality of applications on a screen of the display, performs the screen recording function for the screen of the display displaying the plurality of windows. the electronic device, based on detecting a focused window among the plurality of windows while performing the screen recording function for the screen, records the focused window and an unfocused window. the electronic device, based on identifying a termination of the screen recording function, stores a video in which the focused window and the unfocused window among the plurality of windows are recorded in the memory.
20250216988. ELECTRONIC DEVICE METHOD CONTROLLING TOUCH INPUT (Samsung Electronics ., .)
Abstract: an electronic device according to one embodiment is provided. the electronic device includes a display and at least one processor. the at least one processor includes settings configured by means of a touch screen driver, displays a plurality of windows through the display, activates a first window from among the plurality of windows and sets same as an active window, and, while the first window is active, sets the touch screen driver such that recognition of a touch input in regions other than the first window region is denied.
Abstract: a wearable device grouping and providing a plurality of application execution screens and a method for controlling the same are provided. the wearable device includes a display module and at least one processor configured to control the display module to allow an execution screen of a first application to be shown as a virtual object according to a first type, detect a first user input for executing a second application, after detecting the first user input, determine whether a second user input for requesting to allow an execution screen of the second application to be included and shown in a same group as the execution screen of the first application is detected, and allow the execution screen of the second application to be shown independently from or while forming one group with the execution screen of the first application, based on a result of the determination.
Abstract: a foldable electronic device is provided. the foldable electronic device includes a first housing, a second housing which is connected to the first housing so as to be foldable with reference to a designated axis, and changes an overall shape of the electronic device, a sensor configured to detect a folding state of the electronic device, a display including a flexible display which has at least partial area foldable with reference to the designated axis, and is divided into a first area and a second area with reference to the designated axis, memory storing one or more computer programs, and one or more processors communicatively coupled to the memory, wherein the one or more computer programs include computer-executable instructions that, when executed by the one or more processors individually or collectively, cause the electronic device to detect the folding state of the electronic device by using the sensor, determine, on the basis of the folding state, an area in which an input for displaying a quick panel on the display is to be received and an area in which the quick panel is to be displayed, determine a configuration of the quick panel by determining, based on a running application, a component to be included in the quick panel, and display the quick panel having the determined configuration in the determined area in response to receiving, in the determined area, the input for displaying the quick panel.
Abstract: an electronic device according to an embodiment concurrently displays a first background image of a lock screen and a widget object corresponding to a widget of the lock screen in an edit screen for editing the lock screen. the first background image includes a visual object region obtained using a source image. the electronic device receives a second input for moving the widget object via the edit screen. the electronic device edits the lock screen for obtaining a second background image using the source image such that the visual object region is positioned away from the widget object moved by the second input, in response to releasing the second input corresponding to the widget object moved to at least partially superimposed on the visual object region included in the first background image. the second background image is displayed in the lock screen, with the widget moved according to the second input.
Abstract: an electronic device can display, on a display, a first screen of an application and a visual object for moving the first screen. the electronic device can: display a first list of one or more external electronic devices on the basis that the visual object dragged by means of a first input is moved to an edge area of the display; display a second list of different layouts of the first screen in response to a second input which is received through the first list and which indicates that a first external electronic device is selected; and, in response to a third input for the second list, transmit, to the first external electronic device, information for outputting, through the first external electronic device, a second screen which corresponds to the first screen and which has a layout in the second list selected by means of the third input.
20250217033. EFFECTIVE TRANSACTION TABLE PAGE BITMAP (Samsung Electronics ., .)
Abstract: a transaction manager for use with memory is described. the transaction manager can include a write data buffer to store outstanding write requests, a read data multiplexer to select between data read from the memory and the write data buffer, a command queue and a priority queue to store requests for the memory, and a transaction table to track outstanding write requests, each write request associated with a state that is invalid, modified, or forwarded.
Abstract: in a method of operating a storage device, a first command set corresponding to a first read scheme is transmitted to a nonvolatile memory based on whether a data read request has a first attribute. a second command set corresponding to a second read scheme is transmitted to the nonvolatile memory based on whether the data read request has a second attribute. the first and second command sets include a data read command and a first number of status check commands or a data read command and a second number of status check commands, respectively. the data read command is received from the nonvolatile memory. when an attribute of the data read request is changed, transmission of the the first command set to the nonvolatile memory or the second command set to the nonvolatile memory is dynamically changed.
20250217040. COMPUTING DEVICE METHOD OPERATING SAME (Samsung Electronics ., .)
Abstract: a method of operating a computing device according to an aspect of the inventive concept may include accessing a page of a second tier memory, checking a time taken for the access, checking a total number of accesses of the page based on the time taken for the access, and determining whether to terminate promotion of the page to the first tier memory and a timing of the promotion, based on the total number of accesses of the page.
20250217044. DATA STORAGE DEVICE OPERATING METHOD THEREOF (Samsung Electronics ., .)
Abstract: a storage device includes at least one nonvolatile memory device that stores or read data, and a controller that controls the nonvolatile memory device and to perform a request received from a host. the controller programs buffer data stored in a buffer in the at least one nonvolatile memory device based on one of a plurality of striping rules associated with the at least one nonvolatile memory device. the controller changes a first striping rule to a second striping rule in response to that a given condition is satisfied and programs first buffer data in the at least one nonvolatile memory device based on the second striping rule. a write amplification factor of the first striping rule and a write amplification factor of the second striping rule are different from each other.
20250217045. MEMORY SYSTEM METHOD OPERATING SAME (Samsung Electronics ., .)
Abstract: a memory system includes a memory device including a plurality of blocks, and a memory controller configured to control the memory device. the plurality of blocks include a first block including a first sub-block having a first size and a second sub-block having a second size different from the first size, and a second block including a third sub-block having a third size and a fourth sub-block having a fourth size different from the third size. the first size is equal to the third size. the first sub-block and the third sub-block constitute a first super sub-block. the second size is equal to the fourth size. the second sub-block and the fourth sub-block constitute a second super sub-block. the memory controller is further configured to perform a reliability protection operation on the memory device in units of sub-blocks or super sub-blocks.
20250217048. STORAGE DEVICES INCLUDING NONVOLATILE MEMORY RELATED METHODS (Samsung Electronics ., .)
Abstract: a storage device includes: nonvolatile memory devices including first and second nonvolatile memory devices; a storage controller which receives data blocks from a host, generates a first parity block by performing a first xor operation, and distributes the data blocks and first parity block to respective nonvolatile memory devices; and a data bus for transferring signals between the nonvolatile memory devices and the storage controller. the storage controller receives a new data block from the host and provides the new data block to the second nonvolatile memory device. the first nonvolatile memory device provides the first data block to the second nonvolatile memory device without using the storage controller. the second nonvolatile memory device generates a new parity block by performing a second xor operation on the new data block, the first data block, and the first parity block without the first nonvolatile memory device performing an xor operation.
20250217076. METHOD CONTROLLING STORAGE DEVICE (Samsung Electronics ., .)
Abstract: a method of controlling a storage device includes grouping one or more memory blocks in which physical addresses are continuous, among a plurality of memory blocks included in the device, generating a plurality of zones by mapping continuous physical addresses to continuous logical addresses, controlling sequential write operations using write pointers indicating a logical address of a region in which data is to be written in a next order in each of the plurality of zones, determining invalid zones in which all stored data is invalid data, among the plurality of zones, determining a utilization rate of a storage space of the storage device, determining a write pointer threshold based on the utilization rate, determining a target zone in which a write pointer value is greater than the write pointer threshold, among the invalid zones, and controlling the storage device to erase all memory blocks included in the target zone.
Abstract: an electronic device which including a host device and a storage device. a method of operating the electronic device includes providing, by the host device, a first message including a plurality of packets to the storage device, providing, by the host device, a first command for checking a status of the storage device to the storage device, providing, by the storage device in response to the first command, the host device with a first response including a packet descriptor flag indicating that a first packet among the plurality of packets of the first message is dropped, and providing, by the host device, the storage device with a second command requesting first packet descriptor information of the first packet based on the packet descriptor flag of the first response.
Abstract: according to an embodiment, an electronic device comprises: a first housing; a second housing; a flexible display including a first display area and a second display area extending from the first display area; and at least one processor, comprising processing circuitry, connected to the flexible display through each of a first electrical path and a second electrical path, wherein at least one processor, individually and/or collectively, is configured to control the display to: display, within the first display area, a first screen provided through the first electrical path based on the flexible display being in a first state; display, within the first display area, the first screen provided through the first electrical path based on the flexible display being in a second state; and display, within the second display area, a second screen provided through the second electrical path.
Abstract: a display device includes a display, a speaker; a communication interface; memory storing instructions; and at least one processor, wherein the instructions, when executed, cause the display device to determine whether an external audio device is connected via the communication interface; based on the external audio device not being connected, operate in a first mode that displays a first image corresponding to content and outputs, via the speaker, a first sound corresponding to the content; based on the external audio device being connected, operate in a second mode that displays the first image and outputs the first sound from the external audio device via the communication interface; and based on operating in the second mode, in response to receiving a first control signal to stop outputting the first sound, display the first image, stop outputting the first sound via the communication interface, and mute the first sound.
20250217108. MEMORY APPARATUS PERFORMING PIM OPERATING METHOD THEREOF (Samsung Electronics ., .)
Abstract: a memory apparatus is configured to perform a processing-in-memory (pim) operation. the memory apparatus includes a weight handler circuit configured to receive weights from a memory bank, a multiply-accumulate (mac) circuit, and a register file configured to store input data and an operation result. the weight handler circuit is configured to adjust a distribution of the weights based on a specification of the mac circuit, and the mac circuit is configured to perform an operation on the input data received from the register file and the weights based on a result of the distribution of the weights, to generate the operation result.
20250217150. MEMORY DEVICE ADDRESS GENERATOR OPERATING METHOD THEREOF (Samsung Electronics ., .)
Abstract: a memory device includes a memory array, an address generator, a data register, and a processing unit. the address generator is configured to receive an instruction and a base address of the instruction from a host, and sequentially generate target addresses for performing operations of the instruction by sequentially adding offsets to the base address. the data register is configured to store data values corresponding to one or more of the target addresses. the processing unit is configured to perform one or more of the operations of the instruction based on the data values.
Abstract: an embodiment of the disclosure provides a method for optimising usage of a processing unit that is used to execute machine learning, ml, models. in particular, the present disclosure provides an apparatus and method for processing data using a multi-exit ml model in a way that optimises the usage of a processing unit used to execute the model.
Abstract: a system and method for providing erasure code protection across multiple storage devices. a data switch in a storage system connects a plurality of storage devices to a remote host. each storage device is also connected to a controller, e.g., a baseboard management controller. during normal operation, read and write commands from the remote host are sent to respective storage devices through the data switch. when a write command is executed, the storage device executing the command sends a copy of the data to the controller, which generates and stores erasure codes, e.g., on a storage device that is dedicated to the storage of erasure codes, and invisible to the remote host. when a device fails or is removed, the controller reconfigures the data switch to redirect all traffic addressed to the failed or absent storage device to the controller, and the controller responds to host commands in its stead.
20250217239. DISTRIBUTED STORAGE SYSTEM OPERATING METHOD THEREOF (Samsung Electronics ., .)
Abstract: provided is an operating method of a distributed storage system, the distributed storage system including a first domain including a plurality of computing nodes and a plurality of storage nodes communicating with the plurality of computing nodes via a non-volatile memory express over fabrics protocol and a distribution manager. a second node communicates via a first node. the operating method includes detecting, occurrence of failure of the first node in the first domain; and performing, a recovery operation based on a first tree and a second tree in response to the occurrence of failure being detected by re-allocating, a third node of the first domain to the second node, whereby the second node is able to communicate via the third node.
Abstract: a device for measuring performance of an artificial intelligence (ai) model includes: one or more processors and a memory; and the memory storing instructions configured to cause the one or more processors to perform a process including: determining perturbations for respective classes based on respective class importances and adding noises determined based on the respective perturbations to respective representative vectors of the respective classes; and generating an inference uncertainty of the ai model from inference results outputted by the ai model using a weight matrix including the noise-added representative vectors.
20250217274. METHOD APPARATUS REGISTER FILE OPERATOR (Samsung Electronics ., .)
Abstract: a register file operator including a memory cell array, the memory cell array including plural subarrays configured to perform an operation between data stored in memory cells and input data, the plural subarrays which each include two read ports configured to read data as received data and a write port configured to write data as written data, and an operation circuit configured to output one or more of operation results of the memory cell array and pieces of the received data read through the two read ports.
Abstract: a method includes selecting, by a storage controller, a representative page of a first group stored in a first area included in a non-volatile memory device; receiving, by the storage controller, the representative page from the non-volatile memory device; performing, by the storage controller, an error detection operation of determining a number of error bits for the representative page; based on determining that the number of error bits of the representative page exceeds a threshold value, performing an external copy-back operation, by the storage controller, for each page of the first group to a second area included in the non-volatile memory device; and based on determining that the number of error bits of the representative page is less than or equal to the threshold value, performing an internal copy-back operation, by the storage controller, for each page of the first group to the second area.
20250217281. STORAGE DEVICE METHOD OPERATING SAME (Samsung Electronics ., .)
Abstract: an example method of operating a storage controller that stores one or more logical to physical (l2p) tables includes receiving a request to modify a first logical page number (lpn) from a host, inserting a first node corresponding to the first lpn between a second node related to a second lpn and a third node corresponding to a third lpn, and determining whether a first l2p table is the same as a second l2p table based on a number of pages in an l2p table of the one or more l2p tables. the first l2p table includes the first lpn. the second l2p table includes the second lpn.
Abstract: a storage device, including a nonvolatile memory device comprising a plurality of memory cells; and a controller configured to: allocate a plurality of zones to a storage space of the nonvolatile memory device based on a request received from an external host device, fixedly and sequentially manage logical addresses of data written in the plurality of zones, generate a first page map table corresponding to a first zone based on performing the write operation on the first zone, the first page map table comprising a logical address and a physical address of the first zone, based on the first zone being full, activate a read service, which is based on the zone map table, and based on the read service being activated, process read requests for the first zone from the external host device using the zone map table.
Abstract: a computing system includes a first storage device, a second storage device, a memory device, and a compute express link (cxl) switch. the memory device stores first map data of the first storage device and second map data of the second storage device. the cxl switch is connected with the first storage device, the second storage device, and an external host through a first interface, and arbitrates communications between the first storage device, the second storage device, and the external host. the first storage device is connected with the memory device through a second interface. the second storage device is connected with the memory device through a third interface. the first interface, the second interface, and the third interface are physically separated from each other.
Abstract: a method of predicting semiconductor device failure rate and an electronic device for performing the method are provided. the method of predicting semiconductor device failure rate includes receiving schematic data for a unit circuit in a first circuit and layout data corresponding to the schematic data, generating, by at least one processor, a netlist based on the schematic data and the layout data, performing a first simulation on the layout data to generate first simulation data for a test point of the layout data corresponding to a first node in the netlist, applying the first simulation data to a second simulation for the first node to generate second simulation data regarding whether the unit circuit is in fail operation, and calculating a failure rate for the first circuit based on the second simulation data.
20250217592. METHOD ON-DEVICE PERSONALISATION NLP MODELS (Samsung Electronics ., .)
Abstract: the present techniques generally relate to a computer-implemented method for using continual learning to personalise natural language processing (nlp) models to unseen tasks or domains. the models may be used on various downstream nlp applications, such as text classification (tc), natural language inference (nli), document or aspect sentiment classification (dsc or asc). the framework or architecture which may be used as a natural language processing (nlp) model can be trained using continual learning. the framework employs three main modules. the first module is a tokeniser which incorporates a set of adapter modules which allow for adaptation of the model to both new tasks and/or new domains. the second module is a reduction module which uses high order embedding statistics (which may also be termed statistical descriptors) for modeling different characteristics of data from different domains and tasks. the third module is a classifier in the form of a personalized multi-layer perceptron (mlp) head which is for modelling task-specific information and/or domain-specific information.
Abstract: a method of enabling a language model trained in a first language to support a second language includes extending an existing vocabulary of the language model to include additional tokens for text in the second language. the method also includes initializing the additional tokens for text in the second language based on subtokens of tokens for text in the first language from the existing vocabulary. the method further includes training the language model using a mixed language dataset that includes a first language corpus and a second language corpus. in addition, the method includes performing instruction tuning using a dataset that includes (i) instruction and response pairs involving the first language and (ii) instruction and response pairs involving the second language.
20250217623. IN-MEMORY COMPUTING MACRO METHOD OPERATION (Samsung Electronics ., .)
Abstract: an in-memory computing (imc) macro has a mode alternating between a first mode and a second mode, and the imc macro includes: an input control circuit configured to be capable of generating a signal in which a predefined pattern is applied to an input signal and of transmitting a previous operation result that is fed back, and which is performed depends on which mode the operating mode is in; a crossbar array including memory cells including an additional row that processes and stores the fed-back previous operation result, and columns including an adder tree corresponding to the memory cells; and a post arithmetic circuit configured to be capable of performing a first operation corresponding to a spiking neural network (snn) and a second operation corresponding to an artificial neural network (ann), wherein which of the first and second operations is performed depends on which mode is in effect.
20250217652. DEVICE METHOD NEURAL NETWORK DEPTH COMPRESSION (Samsung Electronics ., .)
Abstract: an electronic device includes one or more processors configured to measure importance and inference time for a plurality of blocks in which consecutive linear layers are merged, detect a location of a nonlinear layer maximizing the importance when the inference time is limited, using a dynamic programming algorithm, remove the remaining nonlinear layers except for the nonlinear layer at the detected location, and merge adjacent linear layers by removing the remaining nonlinear layers.
20250217675. METHOD, DEVICE, APPARATUS TENSOR BROADCASTING OPERATION (Samsung Electronics ., .)
Abstract: a processor-implemented method including, based on a first shape of a first tensor and a second shape of a second tensor used in an operation with the first tensor, determining a broadcasting type related to an extension of the first shape and the second shape, determining respective first shape offsets for each dimension of the first shape and respective second shape offsets for each dimension of the second shape based on the broadcasting type, determining respective first tensor offsets for each dimension of the first tensor and respective second tensor offsets for each dimension of the second tensor based on the broadcasting type, the respective first shape offsets for each dimension of the first shape, and the respective second shape offsets for each dimension of the second shape, determining a first offset of a first element included in the first tensor and a second offset of a second element included in the second tensor based on the respective first tensor offsets and the respective second tensor offsets, and performing the operation by obtaining the first element and the second element based on the first offset and the second offset.
20250217924. ROBUST FRAME REGISTRATION MULTI-FRAME IMAGE PROCESSING (Samsung Electronics ., .)
Abstract: a method includes obtaining, using at least one processing device of an electronic device, multiple image frames capturing a scene. the method also includes selecting, using the at least one processing device, a reference frame among the image frames. the method further includes aligning, using the at least one processing device, each of one or more non-reference frames among the image frames with the reference frame by (i) performing tile-based registration of the non-reference frame to the reference frame, (ii) performing feature-based registration of the non-reference frame to the reference frame, (iii) aggregating first motion vectors generated during the tile-based registration and second motion vectors generated during the feature-based registration, and (iv) warping the non-reference frame based on the aggregated motion vectors to generate an aligned non-reference frame. the reference frame and the one or more aligned non-reference frames may be blended to generate a final image of the scene.
20250217939. METHOD DEVICE IMAGE RESTORATION (Samsung Electronics ., .)
Abstract: a processor-implemented method with image restoration includes obtaining an input image, generating a correction image by converting the input image based on a conversion parameter that converts a pixel value distribution of the input image, generating an output image by inputting the correction image to a quantized image restoration model, and generating an enhanced image by inversely converting the output image based on an inverse conversion parameter corresponding to the conversion parameter.
20250217948. ELECTRONIC APPARATUS CONTROLLING METHOD THEREOF (Samsung Electronics ., .)
Abstract: an electronic apparatus including: a memory storing instructions; and at least one processor configured to execute the instructions, wherein, by executing the instructions, the at least one processor is configured to: acquire an input image, acquire line map information indicating positions of a plurality of lines in the input image, acquire two-dimensional (2d) grid map information including a plurality of grids corresponding to the input image, identify a target line intersecting the plurality of grids included in the d grid map information among the plurality of lines included in the line map information, identify a size of the target line, identify a degree of radial distortion of the target line based on the size of the target line, perform distortion correction on the target line based on the degree of radial distortion, and acquire a corrected image corresponding to the input image based on the distortion correction.
Abstract: disclosed is a defect region detection device which includes a measuring unit that measures pattern information in one or more pattern regions based on a pattern image including the one or more pattern regions and generates gauge data, and a color mapping unit that maps a color corresponding to the gauge data to each of the one or more pattern regions based on the pattern image and the gauge data and generates a color mapping image. the defect region detection device detects a defective region based on the color assigned to each of the one or more pattern regions of the color mapping image.
20250217966. IMAGE PROCESSING DEVICE IMAGE PROCESSING METHOD (Samsung Electronics ., .)
Abstract: an imaging device and an image processing method are provided. an imaging device according to some embodiments includes a memory and a processor which executes programs stored in the memory. the processor acquires a plurality of first images classified for each pattern of a semiconductor device, by using a sem (scanning electron microscope) image of the semiconductor device, and acquires a plurality of reference images in which brightness values are adjusted for each pattern of the semiconductor device by using the plurality of first images.
20250217967. METHOD APPARATUS IMAGE ANOMALY DETECTION (Samsung Electronics ., .)
Abstract: a processor-implemented method includes generating an image feature of an input image and a marker feature of a marker marked on the input image, determining a comparison result of the image feature by comparing the image feature of the input image with a reference image feature of one or more reference images, determining a comparison result of the marker feature by comparing the marker feature with a reference marker feature of a reference marker on the one or more reference images, and detecting whether an anomaly is in the input image based on the comparison result of the image feature and the comparison result of the marker feature.
Abstract: a processor-implemented method including acquiring a first image a first wafer at a first time point, acquiring a second image of the first wafer at a second time point after a predetermined amount of time from the first time point, estimating a calibration factor by using the first image and the second image, and correcting a third image of a second wafer by using the calibration factor.
Abstract: an electronic device may include at least one display, at least one processor, and a memory configured to store instructions. the instructions, when executed by at least one processor, individually and/or collectively may cause the electronic device to: identify whether an input original image is a partially colorized image with an emphasized specific color in a black-and-white background or a monochrome background on the basis of colorfulness, and create a tinted color image in an entire area of the original image; determine a weight corresponding to the original image and a weight corresponding to the color image; and synthesize the input original image and the color image based on the determined weights.
20250218074. METHOD ELECTRONIC DEVICE CREATING CONTINUITY STORY (Samsung Electronics ., .)
Abstract: a method for creating continuity in digital content, the method including: determining a plurality of parameters associated with at least one first image; determining a plurality of parameters associated with at least one second image; generating a graphical representation to connect the at least one first image with the at least one second image based on the plurality of parameters associated with the at least one first image and the plurality of parameters associated with the at least one second image; and displaying the digital content comprising the at least one first image, the at least one second image, and the generated graphical representation between the at least one first image and the at least one second image.
Abstract: an electronic device is provided. the electronic device includes, a display, a communication circuit, at least one processor including processing circuitry, and memory configured to store instructions, wherein the instructions, when individually and/or collectively executed by the at least one processor, cause the electronic device to display an image on the display, receive a first input of selecting a part corresponding to an object in the image, crop the part corresponding to the object in the image, based on the first input, detect a second input of moving the cropped part from an original location in the image, configure and display, as a masking area, an area corresponding to the original location of the cropped part in the image, based on movement of the cropped part, receive a third input of selecting one of the cropped part or the masking area, in case that the third input corresponds to selecting the cropped part, provide a first handler related to editing of the cropped part through the cropped part, in case that the third input corresponds to selecting the masking area, provide a second handler related to editing of the cropped part through the masking area, edit the image in response to a fourth input received based on the first handler or the second handler, based on a fifth input, generate an instruction causing inpainting and/or outpainting to be performed based on the edited image, obtain a result image in relation to the instruction, and display the result image via the display.
20250218091. METHOD SYSTEM GENERATING IMAGINARY AVATAR OBJECT (Samsung Electronics ., .)
Abstract: a method for generating an imaginary avatar of an object is disclosed. the method includes: determining at least one object detail from the object identified from an input content; determining a shape of the object based on the at least one object detail; determining a state of the object based on the input content and the at least one object detail; determining position of a plurality of physical features of the object based on the shape of the object; determining an emotion depicted by the object using the state of the object; and generating the imaginary avatar of the object based on the shape of the object, position of the plurality of physical features, and the determined emotion.
20250218112. METHOD APPARATUS TILE-BASED IMAGE RENDERING (Samsung Electronics ., .)
Abstract: a processor-implemented method included determining first color values of a portion of pixels of plural pixels, the portion of pixels being in a tile frame corresponding to a partial region of an input frame, by performing shading using a shader module on the portion of pixels included, determining second color values of other pixels, the other pixels being pixels of the plural pixels not included in the portion of pixels of the tile frame, by performing neural network-based super-sampling processing on the other pixels, and determining a rendered tile frame including the first color values of the portion of pixels and the second color values of the other pixels, the determining of the first color values of the portion of pixels including determining edge color values of pixels in an edge region by performing shading using the shader module on the pixels in the edge region of the tile frame.
20250218155. METHOD APPARATUS OBJECT DETECTION (Samsung Electronics ., .)
Abstract: a method of training an object detector including obtaining a first tracklet set based on an object detection result output corresponding to a plurality of frames, obtaining a second tracklet set from ground truth data predetermined corresponding to the plurality of frames, obtaining a first bipartite matching result of a bounding box level, the bounding box level corresponding to each of first tracklets included in the first tracklet set and each of second tracklets included in the second tracklet set, obtaining a second bipartite matching result of a tracklet level, the tracklet level corresponding to the first tracklet set and the second tracklet set, based on the first bipartite matching result, and assigning a second tracklet determined to be one of a pair including a first tracklet, as a paired first tracklet and second tracklet, to ground truth data of the first tracklet, based on the second bipartite matching result.
Abstract: a method of updating a recognition model of a robotic mobile device, the method including: obtaining, by an electronic device, from the robotic mobile device, spatial scan data regarding a target space; obtaining, by the electronic device, based on the spatial scan data, spatial information including information about a structure of the target space and an item in the target space; obtaining, by the electronic device, virtual object data including information about a class of a virtual object and a position of the virtual object by inputting the spatial information to a generative model; obtaining, by the electronic device, training data by using the spatial information and the virtual object data; and updating, by the electronic device, the recognition model of the robotic mobile device using the training data.
20250218165. METHOD APPARATUS OBJECT DETECTION (Samsung Electronics ., .)
Abstract: a method and apparatus with object detection are disclosed. a method of detecting an object is performed by one or more processors and the method includes: obtaining a feature of an object region of interest (roi) of an object in an image captured by a first sensor, the feature obtained based on a text-image fusion feature that is a fusion of an image feature of the image and of a text feature of a text, where the text corresponds to the image; obtaining a query corresponding to the object roi, based on the feature of the object roi; and obtaining, based on the query corresponding to the object roi, from a transformer-based object detection model, object detection information in a point cloud that is captured by a second sensor and that corresponds to the image.
20250218174. ELECTRONIC DEVICE METHOD PROVIDING NOTIFICATION INFORMATION (Samsung Electronics ., .)
Abstract: a wearable device may comprise a camera, a display, and a processor. the processor may be configured to: identify, on the basis of physical capability information of a user, one reference level corresponding to the agility of the user from among a plurality of reference levels indicating agility, identify at least one first visual object within an environment from an image which is acquired via the camera and expresses the environment around the wearable device, determine a risk level of the at least one first visual object, identify, from among the at least one first visual object, at least one second visual object whose risk level has been determined to be higher than the reference level, and display together the at least one second visual object and a visual object for the at least one second visual object.
Abstract: a method performed by an electronic device during a call is provided. the method includes receiving, via a microphone, an utterance from a user of the electronic device. the method includes performing, by the electronic device, automatic speech recognition (asr) based on a speech signal corresponding to a portion of the utterance to generate a first text in a first language. the method includes identifying, by the electronic device, an end point of a sentence included in the first text based on at least one pause section associated with the first text. the method includes translating, by the electronic device, a portion of the first text corresponding to the sentence into a second text in a second language, based on the identified end point of the sentence included in the first text. the method includes performing, by the electronic device, a text-to-speech (tts) conversion on the second text. the method includes generating, by the electronic device, a synthetic speech corresponding to a portion of the utterance before an end of the utterance received from the user, based on the tts conversion.
Abstract: according to an embodiment, an electronic device, while obtaining audio data by using a microphone, obtains a plurality of frames by dividing the audio data. the electronic device obtains first vectors respectively corresponding to the plurality of frames. the electronic device determines a speaker corresponding to each of the first vectors by using groups in which the first vectors are respectively included, which are obtained by grouping the first vectors, and second vectors stored in the memory. the electronic device stores within the memory information, which is determined by using a speaker respectively corresponding to the first vectors, indicating a speaker of at least one time section of the audio data. the electronic device, based on a total number of the first vectors and the second vectors greater than a preset number, deletes at least one vector among the first vectors and the second vectors from the memory to adjust the total number to be lower than or equal to the preset number.
Abstract: an electronic device includes: a speaker configured to output an audio signal; a microphone configured to obtain a voice signal of a user; a first memory storing: a first voice recognition engine, a second voice recognition engine that is different from the first voice recognition engine, and instructions; a communication interface configured to establish wireless communication connections with a host device and an external electronic device; and at least one processor operatively connected to the speaker, the microphone, the first memory, and the communication interface, the at least one processor being configured to execute the instructions. the first voice recognition engine is commonly stored in the first memory and a second memory of the external electronic device, and the second voice recognition engine is different from voice recognition engines stored in the second memory.
Abstract: a 3d semiconductor memory device includes a peripheral circuit structure, an intermediate insulating layer and a cell array structure. the cell array structure includes a first substrate including a cell array region and a connection region; a stack structure comprising electrode layers and electrode interlayer insulating layers alternately stacked on the first substrate; a planarization insulating layer covering an end portion of the stack structure on the connection region; and a first through-via penetrating the planarization insulating layer, the first substrate and the intermediate insulating layer. the first through-via connects one of the electrode layers to the peripheral circuit structure. the first through-via includes a first and second via portion integrally connected to each other. the first via portion penetrates the planarization insulating layer and has a first width. the second via portion penetrates the intermediate insulating layer and has a second width greater than the first width.
20250218478. SEMICONDUCTOR MEMORY DEVICES MEMORY SYSTEMS INCLUDING SAME (Samsung Electronics ., .)
Abstract: a semiconductor memory device includes an external resistor in a board, and a plurality of memory dies mounted on the board and that are designated as a master die and slave dies. the memory dies are commonly connected to the external resistor. the master die performs a first impedance calibration operation and outputs a first done signal indicating completion of the first impedance calibration operation to the slave dies through a first impedance pad. each of the slave dies includes a second impedance pad, and receives the first done signal through the second impedance pad, generates an identification signal based on the first done signal, performs a second impedance calibration operation sequentially with respect to the other slave dies based on the identification signal, and outputs a second done signal indicating completion of the second impedance calibration operation through the second impedance pad.
20250218479. DEVICE METHOD MULTI-BIT OPERATION (Samsung Electronics ., .)
Abstract: a multi-bit operation device includes a plurality of multi-bit cells, and a converter configured to convert second sum data into digital data, wherein the second sum data is generated by summing pieces of first sum data output from each of the plurality of multi-bit cells, and each of the plurality of multi-bit cells comprises a memory configured to store a weight resistance corresponding to a multi-bit weight, a current source configured to apply current to the memory such that a weight voltage is generated from the weight resistance, a plurality of multiplexers connected to one another in parallel and connected to the memory in series and each configured to output a signal of one of the weight voltage and a first fixed voltage, based on a multi-bit input, a plurality of capacitors connected respectively to the plurality of multiplexers and each configured to store a separate weight capacitance and generate charge data by performing an operation on the output signal and the weight capacitance, a bit line configured to output first sum data generated by summing pieces of charge data generated by each of the plurality of capacitors, and a switch of which an end is connected to the memory and an opposite end to the end is connected to the bit line.
20250218487. SEMICONDUCTOR MEMORY DEVICE METHOD OPERATING SAME (Samsung Electronics ., .)
Abstract: a semiconductor memory device includes a memory cell array including a plurality of memory cell rows, a row hammer management circuit, and a refresh control circuit. the row hammer management circuit captures row addresses accompanied by first active commands randomly selected from active commands, each of which has a first selection probability that is uniform, from an external memory controller during a reference time interval, and selects at least one row address from among the captured row addresses as a hammer address a number of times proportional to access counts of an active command corresponding to the at least one row address during the reference time interval. the refresh control circuit receives the hammer address and performs a hammer refresh operation on one or more victim memory cell rows which are physically adjacent to a memory cell row corresponding to the hammer address.
Abstract: a memory device includes a plurality of memory cells and a refresh control circuit that generates a refresh row address and performs a refresh operation on memory cells of a row corresponding to the refresh row address. the refresh control circuit includes a row hammer managing circuit that includes a first row address generator that receives first input row addresses during a first monitoring length and determines a first candidate address among the first input row addresses based on a first reference address, a second row address generator that receives second input row addresses during a second monitoring length longer than the first monitoring length and determines a second candidate address among the second input row addresses based on a second reference address, and a row address checker that determines an aggressor row address based on the first candidate address and the second candidate address.
20250218492. SEMICONDUCTOR MEMORY DEVICE METHOD OPERATING SAME (Samsung Electronics ., .)
Abstract: a method of operating a semiconductor memory device includes: providing nbti information including row addresses of nbti vulnerable cells among the plurality of memory cells such that a decrease in a threshold voltage of the cell transistor due to application of the normal turn-off voltage about the nbti vulnerable cells is greater than a reference decrease value; providing pbti information including row addresses of pbti vulnerable cells among the plurality of memory cells such that an increase in the threshold voltage of the cell transistor due to application of the normal turn-on voltage about the pbti vulnerable cells is greater than a reference increase value; increase the threshold voltage of the nbti vulnerable cells by performing an nbti compensation operation based on the nbti information; and decrease the threshold voltage of the pbti vulnerable cells by performing a pbti compensation operation based on the pbti information.
Abstract: a memory core circuit includes a memory cell array including sub cell arrays and a core control circuit including sub peripheral circuits under the sub cell arrays. the sub peripheral circuits are divided into first and second column edge regions and a central region. the central region is between the first column edge region and the second column edge region. a sense amplifier region including a plurality of bitline sense amplifiers are disposed in at least one of the first column edge region and the second column edge region. a wordline driver region including a plurality of sub wordline drivers is disposed in the central region. at least a portion of device peripheral circuits configured to control the memory core circuit is disposed in a rest region other than the sense amplifier region and the wordline driver region.
Abstract: a memory core circuit includes a memory cell array including sub cell arrays and a core control circuit including sub peripheral circuits respectively disposed under the sub cell arrays. each sub cell array includes memory cells respectively connected to wordlines and bitlines. the wordlines extend in a row direction and are arranged in a column direction. the bitlines extend in the column direction and are arranged in the row direction. each sub peripheral circuit is divided into first and second column edge regions and a central region. the central region is between the first column edge region and the second column edge region. a sense amplifier region including a plurality of bitline sense amplifiers are in at least one of the first column edge region and the second column edge region. a wordline driver region including a plurality of sub wordline drivers is disposed in the central region.
20250218498. SENSE AMPLIFIER METHOD OPERATION THEREOF (Samsung Electronics ., .)
Abstract: a sense amplifier that senses and amplifies data stored in a memory cell includes a first sampling circuit that performs a sampling operation based on a first current, a second sampling circuit that performs a sampling operation based on a second current, and a sense amplification circuit configured to generate an offset compensation voltage that compensates for an offset between a first data output node and a second data output node through an offset compensation operation. data stored in the memory cell may be read based on the magnitude of the current received from the memory cell, and the sensing time utilized to read data stored in the memory cell may be shortened.
Abstract: a memory device includes control logic configured to control memory cell planes based on a determination result, wherein the control logic is further configured to, in response to the determination result for a first program loop in which a first memory cell plane is determined to be program-passed and a second memory cell plane is determined to be program-failed through a first verify voltage for a first program state, control the memory cell planes so that a number of times the verify operation of the first memory cell plane is performed is different from a number of times the verify operation of the second memory cell plane is performed in a second program loop performed sequentially after the first program loop.
Abstract: in an example method of operating a nonvolatile memory device, an erase command and a block address designating a target memory block from a plurality of memory blocks are received. whether the target memory block is an open block including at least one erased word-line is determined based on the erase command and the block address. a pre-program voltage having a first voltage level is applied to word-lines of the target memory block during pre-program period of a erase loop based on the target memory block being a closed block including only programmed word-lines. a pre-program voltage having a second voltage level greater than the first voltage level is applied to a portion of a region, including the at least one erased word-line, of the target memory block during the pre-program period based on the target memory block being the open block.
Abstract: a memory device includes: a memory cell array including a plurality of memory cells; bitlines connected to the plurality of memory cells; shield lines, each being arranged between the bitlines; and a shield line control circuit configured to control a timing of supplying a shield voltage to the shield lines based on a command received from an outside of the memory device.
Abstract: provided is a contamination prevention device configured to prevent contamination of extreme ultra-violet (euv) reticle, including at least one electron source including a first electron source on a first side of the euv reticle outside a space between the euv reticle and a slit-plate, wherein, during an euv exposure process, the at least one electron source is further configured to emit the electrons into the space to neutralize the euv reticle.
20250218721. SCANNING ELECTRON MICROSCOPE DEVICE (Samsung Electronics ., .)
Abstract: a scanning electron microscope device includes an electron beam source emitting a plurality of electron beams travelling to an object mounted on a stage along a plurality of different travel paths, a plurality of detectors into which a plurality of signal beams emitted from the object by the plurality of electron beams are respectively incident, and a controller determining modulation characteristics of each of the plurality of electron beams and the number of the plurality of electron beams. the controller controls the electron beam source and the plurality of detectors so that two or more signal beams are incident on each of the plurality of detectors. the controller separates an individual signal corresponding to each of the two or more signal beams from an output signal of each of the plurality of detectors, and generates an image of a target area of the object emitting the plurality of signal beams.
Abstract: a plasma generation circuit includes a power generator including a first function output unit configured to generate a first harmonic signal and a second function output unit configured to generate a compensation signal; a load unit electrically connected to one side of the power generator and configured to transmit the first harmonic signal and the compensation signal to a sensor; and a controller connected to the power generator and the sensor, wherein the sensor is provided between the load unit and an electrode configured to generate plasma based on receiving the first harmonic signal and the compensation signal, the controller is configured to generate a control signal based on the first harmonic signal received from the sensor, and the second function output unit is configured to generate the compensation signal based on the control signal.
Abstract: a substrate processing apparatus includes a process chamber having a process space and a port hole, a view port located within the port hole and coupled to the process chamber, a reflector facing the view port and located on an inner wall of the process chamber, a measurement device connected to the view port and measuring plasma in the process space. the measurement device may include a first measurement unit measuring transmittance of the view port reduced by by-products and a second measurement unit measuring electron density in the plasma.
Abstract: a semiconductor device includes: a semiconductor molding upper mold and a semiconductor molding lower mold, wherein a printed circuit board having a plurality of semiconductor devices mounted thereon is disposed on the semiconductor molding lower mold; and a cavity disposed between the semiconductor molding upper mold and the semiconductor molding lower mold, wherein the printed circuit board includes internal through holes and external through holes, wherein the external through holes are spaced apart from a position where the plurality of semiconductor devices are mounted, and the semiconductor molding lower mold has through holes that overlap the internal through holes and the external through holes.
20250218810. SUBSTRATE DRYING APPARATUS SUBSTRATE DRYING METHOD (Samsung Electronics ., .)
Abstract: a substrate drying apparatus includes a process chamber including a processing space for drying a residual liquid remaining on a surface of a substrate, a first fluid supply device configured to supply a first fluid to the processing space, wherein the solubility of the residual liquid in the first fluid is a first solubility, a second fluid supply device configured to supply a second fluid in a supercritical state to the processing space, wherein the solubility of the residual liquid in the second fluid is a second solubility that is greater than the first solubility, and an exhaust device configured to discharge a waste fluid within the processing space of the process chamber to the outside of the process chamber.
20250218811. SCRUBBER APPARATUS (Samsung Electronics ., .)
Abstract: a scrubber apparatus includes a chamber, an air intake unit connected to a semiconductor processing apparatus including a plurality of processing chambers and intaking exhaust gas discharged from the plurality of processing chambers into a processing space inside the chamber, a treated water supply pipe installed in the processing space, connected to a plurality of spray nozzles spraying treated water, and supplying the treated water to the processing space, a wastewater discharge unit discharging wastewater in which the exhaust gas is dissolved by the treated water from the processing space, a gas discharge unit connected to the chamber and discharging residual gas, and a controller communicatively connected to the semiconductor processing apparatus and adjusting an amount of the treated water supplied to the processing space based on the number of active processing chambers in progress among the plurality of processing chambers.
20250218817. SUBSTRATE BONDING APPARATUS (Samsung Electronics ., .)
Abstract: a substrate bonding apparatus for bonding a first substrate to a second substrate includes a lower bonding chuck configured to support the first substrate, an upper bonding chuck facing the lower bonding chuck and configured to support the second substrate, a gas discharge device provided through the center of the upper bonding chuck and configured to discharge pressurized gas to a top surface of the second substrate, a gas supply unit configured to supply the pressurized gas to the gas discharge device, and a controller configured to control the gas discharge device and the gas supply unit and the controller controls vertical movement of the gas discharge device with respect to the upper bonding chuck, and a flow rate and pressure of the pressurized gas in the gas discharge device.
20250218826. ELECTRONIC DEVICE METHOD OPERATION THEREOF (Samsung Electronics ., .)
Abstract: an electronic device and a method of operating the same are provided. the electronic device includes a communication circuit, at least one processor, and a memory, wherein the memory stores instructions that, when executed by the at least one processor, cause the electronic device to obtain real-time facility data while a target process for a semiconductor wafer is in progress, post-process the real-time facility data, generate at least one factor that quantifies a process state for each time section of the target process based on the processed real-time facility data, and predict a defect index of the target process based on the at least one factor.
20250218842. SUBSTRATE PROCESSING APPARATUS (Samsung Electronics ., .)
Abstract: a substrate processing apparatus may include a substrate support unit in a lower portion of a process chamber; an edge ring on and along an edge of an upper surface of the substrate support unit and protruding from the upper surface of the substrate support unit; and a substrate alignment sensor on the substrate support unit. the substrate alignment sensor may include a body, an imaging unit, and a control unit. the imaging unit may be on a bottom surface of the body and configured to image a sidewall of the edge ring and a sidewall of the body. the control unit may be configured to control the imaging unit and calculate a spacing between the sidewall of the edge ring and the sidewall of the body. the control unit may be configured to align the substrate alignment sensor with the substrate support unit based on the spacing.
20250218843. SUBSTRATE HOLDING UNIT SUBSTRATE PROCESSING APPARATUS (Samsung Electronics ., .)
Abstract: a substrate holder includes: a core body having a first surface facing a direction in which a substrate is mounted and a second surface opposite to the first surface; an electrode layer on the first surface and the second surface of the core body; a ceramic insulating layer covering the electrode layer on the first surface and the second surface of the core body; a coating layer covering the ceramic insulating layer and forming an outermost surface facing the substrate; and a buffer layer between the ceramic insulating layer and the coating layer, wherein the buffer layer includes a material having a strain energy density lower than a strain energy density of the coating layer.
20250218844. SUBSTRATE HOLDING UNIT SUBSTRATE PROCESSING APPARATUS (Samsung Electronics ., .)
Abstract: according to an example embodiment of the present disclosure, provided is a substrate holding unit including: a core body having a first surface for supporting a substrate and a second surface opposite to the first surface; an electrode layer disposed on the first surface and the second surface of the core body; and a ceramic insulating layer covering the electrode layer and disposed on the first surface and the second surface of the core body, wherein a first surface of the ceramic insulating layer on the first surface of the core body includes a cubic crystal structure in at least a portion thereof, and includes a hexagonal crystal structure in at least another portion thereof.
20250218849. WAFER BONDING APPARATUS (Samsung Electronics ., .)
Abstract: provided is a wafer bonding apparatus including a first chuck configured to suction a first wafer on a first surface of the first chuck, a second chuck configured to suction a second wafer on a second surface of the second wafer that faces the first surface of the first chuck, a plurality of bonding pin members in the second chuck in a direction parallel to the second surface of the second chuck, the plurality of bonding pin members being configured to be individually operable, and a plurality of drivers connected to the plurality of bonding pin members, respectively, the plurality of drivers being configured to move the connected plurality of bonding pin members, respectively, in a first direction perpendicular to the second surface of the second chuck, wherein the second chuck includes a plurality of vacuum regions adjacent to the plurality of bonding pin members, respectively.
20250218853. CHIP EJECTOR (Samsung Electronics ., .)
Abstract: the chip ejector includes a chamber including an inner space, a holder disposed on the chamber, and having an upper surface and a lower surface opposite to the upper surface, a plurality of holes formed in the holder along a vertical direction, which is perpendicular to the first direction and the second direction and spaced apart from each other in the first direction, and the second direction and a pressurization unit providing pressurized air to a mount tape that is disposed on the holder. the pressurization unit includes at least one air pin inserted into at least one hole among the plurality of holes along the vertical direction and having a discharge hole extending along the vertical direction and an air inlet pipe fastened to the air pin and comprising at least one path through which a pressurized air flow is provided to the air pin.
Abstract: a method incudes forming a trench in a substrate; conformally forming a first insulating layer on a top surface of the substrate and on an inner wall of the trench through a thermal oxidation process; forming a second insulating layer on the first insulating layer through an atomic layer deposition process such that a portion of the second insulating layer is within the trench; performing a dry etching process on the second insulating layer and the first insulating layer such as to expose the top surface of the substrate; and forming a device isolation layer inside the trench, the device isolation layer including a first insulating pattern formed by etching the first insulating layer and a second insulating pattern formed by etching the second insulating layer, wherein the device isolation layer has a round top surface.
20250218889. SEMICONDUCTOR PACKAGES MANUFACTURING METHODS THEREOF (Samsung Electronics ., .)
Abstract: a semiconductor package includes a buffer die; a first core die on the buffer die; and a first dummy die on the first core die, wherein the buffer die includes: a first substrate including a first surface and a second surface; a first bonding insulating film on the second surface, wherein the first core die includes: a second substrate including a third surface facing the second surface and a fourth surface; and a second bonding insulating film that is in contact with the first bonding insulating film, wherein the first dummy die includes: a third substrate including a fifth surface facing the fourth surface and a sixth surface; a third bonding insulating film on the sixth surface; and a first metal pattern in the third bonding insulating film extending from a first corner region across a central portion of the first dummy die.
Abstract: a semiconductor package includes a first insulating layer, a second insulating layer on the first insulating layer, the second insulating layer having an opening, a pad on the first insulating layer or the second insulating layer to at least partially vertically overlap the opening, and a pad surface layer on an upper surface of the pad to at least partially vertically overlap the opening, the pad surface layer including a conductive material different from that of the pad. the upper surface of the pad is recessed to have a shape more curved than that of a lower surface of the pad.
20250218943. SEMICONDUCTOR DEVICES (Samsung Electronics ., .)
Abstract: provided is a semiconductor device including: a lower structure including a substrate, and a lower transistor on the substrate; an intermediate structure on the lower structure; and an upper structure on the intermediate structure, the upper structure including an upper transistor and a data storage structure, wherein the intermediate structure includes: an intermediate interlayer insulating layer on the lower structure; an intermediate interconnection structure including an intermediate plug and an intermediate interconnection portion on the intermediate plug, wherein the intermediate plug penetrates the intermediate interlayer insulating layer; an intermediate stopper layer including an intermediate stopper horizontal portion on the intermediate interlayer insulating layer, and an intermediate stopper extension portion extending from the intermediate stopper horizontal portion and covering a side surface and an upper surface of the intermediate interconnection portion; and an intermediate gap-fill insulating layer on an external side surface of the intermediate stopper extension portion and on the intermediate stopper horizontal portion of the intermediate stopper layer.
Abstract: provided is an interconnector including a metal layer, a dielectric layer on the metal layer and including a hole exposing a surface of the metal layer, a reaction inhibitor in the hole and contacting a lateral surface of the dielectric layer, a first ruthenium via in the hole, the first ruthenium via contacting the metal layer and the reaction inhibitor, and a second ruthenium via in the hole, the second ruthenium via contacting the first ruthenium via and the reaction inhibitor, a resistivity of the second ruthenium via being greater than a resistivity of the first ruthenium via.
20250218950. SEMICONDUCTOR DEVICE METHOD FABRICATING SAME (Samsung Electronics ., .)
Abstract: a semiconductor device may include: a first source/drain pattern; a first active contact on the first source/drain pattern; a power line above the first active contact; and a first via contact connecting the first active contact to the power line, wherein the first via contact comprises a first side surface and a second side surface, which are opposite to each other in a first direction, the first side surface is inclined at a first angle to a top surface of the first active contact, the second side surface is inclined at a second angle to the top surface of the first active contact, and the first angle is an obtuse angle, and the second angle is an acute angle.
20250218951. Semiconductor Device (Samsung Electronics ., .)
Abstract: a semiconductor device includes a lower structure, a stack structure on the lower structure and extending from a memory cell region into a connection region, gate contact plugs on the stack structure in the connection region, and a memory vertical structure through the stack structure in the memory cell region, wherein the stack structure includes interlayer insulating layers and horizontal layers alternately stacked, wherein, in the connection region, the stack structure includes a staircase region and a flat region, wherein the staircase region includes lowered pads, wherein the flat region includes a flat pad region, a flat edge region, and a flat dummy region between the flat pad region and the flat edge region, and wherein the gate contact plugs include first gate contact plugs on the pads, flat contact plugs on the flat pad region, and a flat edge contact plug on the flat edge region.
20250218968. PRINTED CIRCUIT BOARD SEMICONDUCTOR PACKAGE INCLUDING SAME (Samsung Electronics ., .)
Abstract: a printed circuit board includes a substrate base, a plurality of substrate wiring patterns on an upper surface and a lower surface of the substrate base, the plurality of substrate wiring patterns including at least one equipotential plane, a plurality of equipotential plating lines, a plurality of signal plating lines, and a plurality of upper connection pads on the upper surface of the substrate base, the at least one equipotential plane including at least one main equipotential plane and a plurality of sub-equipotential planes, a plurality of upper pad layers covering at least portions of the plurality of upper connection pads, and an upper solder resist layer covering a portion of the upper surface of the substrate base and portions of the plurality of substrate wiring patterns, wherein the upper solder resist layer includes a plurality of etchback openings arranged in a column in a first lateral direction.
20250218969. SEMICONDUCTOR PACKAGE (Samsung Electronics ., .)
Abstract: a semiconductor package may include a lower redistribution structure including redistribution patterns, a first semiconductor device on the lower redistribution structure, a core layer laterally apart from the first semiconductor device, the core layer on the lower redistribution structure and including a core insulating layer and core wires, an encapsulation material on the lower redistribution structure and at least partially covering side and upper surfaces of the core layer and of the first semiconductor device, a second semiconductor device on the encapsulation material, and a heat dissipation structure.
20250218981. SEMICONDUCTOR DEVICE (Samsung Electronics ., .)
Abstract: a semiconductor device includes a substrate having a first region and a second region, an integrated circuit structure in the first region, a guard ring surrounding the integrated circuit structure in the second region, a plurality of vias arranged on the guard ring, and a conductive line arranged on the plurality of vias. the integrated circuit structure includes a circuit active fin in the first region, a gate structure intersecting the circuit active fin, a source/drain region on an active fin adjacent to a side surface of the gate structure, a circuit contact structure on the source/drain region, and a circuit wiring structure on the circuit contact structure. the guard ring includes a guard active structure in the second region, a plurality of guard contact structures arranged on the guard active structure, and a guard wiring structure on the guard contact structures.
20250219000. SEMICONDUCTOR PACKAGE (Samsung Electronics ., .)
Abstract: a semiconductor package includes an insulating layer; first pads respectively surrounded by the insulating layer; second pads electrically connected to the first pads; solders between and connected to the first pads and the second pads, and respectively surrounded by the insulating layer, and margin portions including an insulating material, surrounding the solders, and respectively surrounded by the insulating layer.
20250219011. CHUCK WAFER BONDING DEVICE (Samsung Electronics ., .)
Abstract: a chuck for a wafer bonding device includes a body, a chuck portion installed on the body and that forms an internal space together with the body, and that includes a partition that divides the internal space, a valve installed on the body and that provides pneumatic pressure to each divided internal space, and a sensor disposed on the body at a lower portion of the partition. the valve adjusts and supplies pneumatic pressure to the divided internal space so that a shape of an upper surface of a deformable plate of the chuck portion is deformed.
20250219014. SEMICONDUCTOR REFLOW APPARATUS (Samsung Electronics ., .)
Abstract: a semiconductor reflow apparatus includes a conveyor comprising a laterally moveable surface configured to move in a first direction, a pickup tool including a head disposed above the conveyor, and an induction heating coil configured to generate a magnetic field in a direction passing through a surface of the conveyor, wherein the pickup tool is further configured to move the head in a vertical direction toward the conveyor.
Abstract: a method of manufacturing a semiconductor package may use a carrier substrate and may include forming a first glue layer on a device substrate; forming a second glue layer on the first glue layer; coupling the device substrate to a carrier substrate by bonding the second glue layer to the carrier substrate; thinning the device substrate by grinding the device substrate; stacking first semiconductor chips on the device substrate after the thinning the device substrate; and separating the carrier substrate from the device substrate at an interface between the first glue layer and the second glue layer.
Abstract: a sub-assembly for an electrode-solid electrolyte, an all-solid-state battery comprising the same, and a method of preparing the all-solid-state battery. the electrode-solid electrolyte sub-assembly includes an electrode including a porous current collector having a first side and an opposite second side; an elastic layer including an elastic polymer and disposed on the first side of the porous current collector; and a solid electrolyte disposed on the opposite second side of the porous current collector. the porous current collector includes a plurality of internal pores and the elastic polymer is disposed in at least one internal pore of the plurality of internal pores of the porous current collector.
20250219293. ELECTRONIC DEVICE COMPRISING ANTENNA (Samsung Electronics ., .)
Abstract: an electronic device may include a substrate and a wireless communication circuit. the substrate may include a housing, a ground area, a first conductive pattern, a second conductive pattern, and a third conductive pattern. the housing may include a conductive portion. the first conductive pattern is electrically connected to the conductive portion. the second conductive pattern is electrically connected to the ground area. the first conductive pattern electrically connects the conductive portion to the ground area. the wireless communication circuit is configured to supply power to the conductive portion through the first conductive pattern. the second conductive pattern may include a closed loop shape. the second conductive pattern is at least partially located between at least the first conductive pattern and the third conductive pattern.
20250219302. SEPARABLE ANTENNA ELECTRONIC DEVICE COMPRISING SAME (Samsung Electronics ., .)
Abstract: the disclosure relates to a 5th generation (5g) or pre-5g communication system for supporting a higher data transmission rate than a 4th generation (4g) communication system such as long term evolution (lte). an antenna module is provided. the antenna module includes a plurality of antennas, a first printed circuit board (pcb) on which the plurality of antennas are disposed, a second pcb on which one or more elements for processing a radio frequency (rf) signal are disposed, and an adhesive material for bonding the first pcb and the second pcb, wherein the first pcb includes a first metal layer, a second metal layer, a dielectric, and a coupling structure plated along the first metal layer, the second metal layer, and a via hole between the first metal layer and the second metal layer, and may be disposed to provide a coupling connection through the coupling structure of the first pcb.
Abstract: a motor for a compressor, according to one embodiment of the present disclosure, may comprise one or more magnets. the motor may comprise a rotor core having a plurality of magnet support structures, which define one or more magnet-mounting spaces, disposed on the inner circumferential surface of the rotor core. the motor may comprise a rotor housing that is injection molded to be integrally coupled to the magnets and the rotor core. the magnet-mounting spaces may have one of the magnets inserted and arranged along a first direction. the magnet support structures may have, on the inner side thereof, a pass hole through which resin flows based on the injection molding of the rotor housing.
Abstract: disclosed is a semiconductor device, which includes a semiconductor integrated circuit (ic) chip including a load circuit which receives a load current from an integrated voltage regulator (ivr), and a substrate including an electrical path for providing a signal to the semiconductor ic chip, and the ivr includes a capacitor including one end connected to an output node and the other end connected to a ground, an inductor connecting the output node to an input node, and a first switch, a second switch, and a third switch, one end of each switch respectively connected to the input node, and the first switch, the second switch, and the third switch alternately provide a first input voltage, a second input voltage, and a ground voltage to the input node, respectively.
Abstract: a communication device may comprise an amplifier providing, to an antenna, an amplified input signal generated by amplifying an input signal of target frequency, a power detector circuit generating a detected power value by detecting power of the amplified input signal, a memory circuit configured to store first and second representative correction value corresponding to first frequency and second representative frequency, respectively, an interpolation circuit calculating, based on the first and second representative correction value, a first interpolation correction value corresponding to the target frequency, a residual compensation circuit reading a first generalized residual corresponding to the target frequency from an external memory device and to generate a first compensation correction value based on the first generalized residual and the first interpolation correction value, and a gain control circuit controlling a gain of the amplifier based on the first compensation correction value.
20250219600. AMPLIFICATION DEVICE OPERATION METHOD THEREOF (Samsung Electronics ., .)
Abstract: an amplification device including: a pulse generation circuit configured to generate a pulse signal from an input signal and a tri-wave signal; a driver circuit configured to output an output signal corresponding to the pulse signal, based on a first pair of operating voltages among a plurality of operating voltages; and a tri-wave generation circuit configured to generate the tri-wave signal, and to adjust a level of the tri-wave signal in proportion to a second pair of operating voltages, when the first pair of operating voltages is changed to the second pair of operating voltages.
20250219603. AMPLIFYING CIRCUIT AMPLIFYING DEVICE (Samsung Electronics ., .)
Abstract: an amplifying circuit, which includes a first power stage circuit that outputs a first output signal to a first node based on a pull-up or a pull-down, a second power stage circuit that outputs a second output signal to a second node based on the pull-up or the pull-down, a current path switch connected to the first node and the second node, and that is turned on when the first power stage circuit and the second power stage circuit are turned off, and a voltage supply circuit that supplies a common mode voltage for the first output signal and the second output signal to the first node and the second node when the first power stage circuit and the second power stage circuit are turned off.
20250219640. SEMICONDUCTOR DEVICES POWER GATING (Samsung Electronics ., .)
Abstract: a semiconductor device includes a retention circuit configured to retain a data value during a power gating operation, a non-retention circuit configured not to retain a data value during the power gating operation, a clock management unit (cmu) configured to provide a first operation clock to the retention circuit and provide a second operation clock to the non-retention circuit, and a power management unit (pmu) configured to provide a reference clock used to generate the first and second operation clocks to the cmu, generate a first isolation signal to permit a first signal to be output from the cmu, and generate a second isolation signal to permit a second signal to be output from the retention circuit and to permit a third signal to be output from the non-retention circuit.
20250219646. ANALOG-TO-DIGITAL CONVERTER CIRCUIT METHOD DEVICE USING SAME (Samsung Electronics ., .)
Abstract: an analog-to-digital converter (adc) circuit includes an adc module configured to convert an analog input signal into an original digital output signal, an error detection module configured to detect overflow of the original digital output signal due to the analog input signal being out of an input dynamic range of the adc module and determine a current state of the original digital output signal as a normal state or an error state, and a correction module configured to, in response to the current state of the original digital output signal being the normal state, output a corrected digital output signal based on the original digital output signal and, in response to the current state of the original digital output signal being the error state, output the corrected digital output signal based on a replacement output signal for replacing the original digital output signal.
Abstract: a pipelined analog-to-digital converter includes a first stage circuit and a second stage circuit. the first stage circuit performs an analog-to-digital conversion on an analog input voltage to generate a first output signal including m higher bits among (m+n) bits of a digital output code corresponding to the analog input voltage, and generates a residue voltage corresponding to n lower bits among the (m+n) bits of the digital output code wherein m and n are natural numbers. the second stage circuit includes a residue amplifier configured to sequentially amplifying the residue voltage and a comparison voltage to generate an amplified residue voltage and an amplified comparison voltage.
20250219654. PHASE INTERPOLATOR MEMORY DEVICE INCLUDING SAME (Samsung Electronics ., .)
Abstract: a phase interpolator providing a pair of differential outputs according to a plurality of inputs with a plurality of phases, the phase interpolator including: a main digital-to-analog converter (dac) circuit configured to phase-interpolate a first input and a second input, which have orthogonal phases among the plurality of inputs, according to a main code to generate a main output signal; an auxiliary dac circuit configured to phase-interpolate the first input and the second input according to an auxiliary code corresponding to the main code to generate an auxiliary output signal; and an output buffer configured to generate the pair of differential outputs according to a differential input based on a phase output signal, which is the sum of the main output signal and the auxiliary output signal.
Abstract: a sample-and-hold circuit with improved performance is described. the sample-and-hold circuit comprises first and second differential input terminals receiving distinct first and second differential input voltages. the sample-and-hold circuit also includes first and second unity gain buffers receiving, respectively, the first and second differential input voltages from the first and second differential input terminals. the sample-and-hold circuit includes an amplifier comparing received voltages and amplifying results of the comparison. the amplifier generates a feedback voltage which regulates outputs of the first and second unity gain buffers. the feedback voltage is based on a reference voltage and a common mode voltage that is provided from the first and second unity gain buffers.
Abstract: methods and devices are provided in which a channel encoded with a polarization-adjusted convolutional (pac) code is received. a decoded codeword is generated based at least in part on simplified successive cancellation list (sscl) decoding performed on the channel via a decoding tree. the decoding tree includes a node that generates candidate codeword output based on predefined processing using convolutional code (cc) state input and channel vector input. a sub-tree of the node remains unprocessed.
Abstract: a receiver configured to receive a signal may include a symbol, the receiver may include: at least one memory storing instructions; and at least one processor configured to execute the instructions to: generate a first posteriori log likelihood ratio corresponding to a bit in the symbol based on a channel log likelihood ratio corresponding to the bit; apply a first scaled value to a first extrinsic log likelihood ratio in the first posteriori log likelihood ratio; generate a first priori log likelihood ratio by selectively using a first reference value based on a comparison result; generate a second posteriori log likelihood ratio corresponding to the bit based on the first priori log likelihood ratio and the channel log likelihood ratio; and decode the signal based on the second posteriori log likelihood ratio.
20250219674. WIRELESS COMMUNICATION DEVICE METHOD WIRELESS COMMUNICATION (Samsung Electronics ., .)
Abstract: a wireless communication device including: a radio frequency integrated circuit (rfic), including n signal processing modules, a switching module and n communication ports; an antenna switch module; and an antenna array, including m antennas, wherein each of the n signal processing modules is configured to process a signal to be transmitted from the signal processing module and a signal that is received by the signal processing module, wherein the switching module is configured to be connected between the n signal processing modules and the n communication ports and connects one of the n signal processing modules to one of the n communication ports, wherein each of the n communication ports is connected to at least one of the m antennas through the antenna switch module, and n and m are integers greater than 1.
Abstract: provided are an operation method of a user equipment and a user equipment for the operation method. the operation method includes obtaining channel estimation information comprising beam direction information of a base station. the operation method includes performing channel estimation for beamforming based on the channel estimation information. the operation method includes forming a beam based on the channel estimation. the beam direction information of the base station is generated using a geographic coordinate system.
Abstract: the disclosure relates to a 5g or 6g communication system for supporting a higher data transmission rate. the disclosure relates to operations of a ue and base station in a wireless communication system, and specifically, the disclosure relates to a method for transmitting and receiving an uplink reference signal in a wireless communication system and an apparatus capable of performing the same. the disclosure provides an apparatus and method capable of effectively providing services in a mobile communication system.
Abstract: a modem chip includes a radio frequency integrated circuit (rfic) configured to receive a signal including channel state information, and a processor configured to determine a signal to interference ratio (sir) of the received signal based on the channel state information. the processor selects a log likelihood ratio (llr) calculation mode among at least two llr calculation modes that differently calculate an llr of the received signal, by comparing the sir with at least one threshold, and decodes the received signal by calculating the llr of the received signal based on the selected llr calculation mode.
Abstract: a system and a method are disclosed for performing a-iot based communications. the method includes receiving, by an a-iot device, an energizing signal, causing, based on the energizing signal, the a-iot device to become activated, storing energy from the energizing signal in the a-iot device, a duration of the energizing signal including a duration associated with activating the a-iot device and/or a duration associated with storing the energy to satisfy a threshold amount of energy, receiving, by the a-iot device, a first signal including a preamble, at least a portion of the preamble indicating a beginning of a payload associated with the first signal, and decoding, by the a-iot device, at least a portion of the payload based on the preamble.
20250219791. METHOD APPARATUS SETTING BEAM WIRELESS COMMUNICATION SYSTEM (Samsung Electronics ., .)
Abstract: the present disclosure relates to a 5g or 6g communication system for supporting higher data transmission rates. the present disclosure relates to a method performed by a terminal in a communication system, the method comprising: receiving, from a base station, first downlink control information including first tci state information on a first coreset; determining whether to apply the first tci state information to pdcch reception on the basis of the first coreset; and when it is determined to apply the first tci state information to the pdcch reception, receiving, from the base station, dci on the pdcch on the basis of the first tci state information, wherein the first tci state information corresponds to a common tci state.
Abstract: the present disclosure describes a method and apparatuses for a ue or a base station to receive a phase tracking reference signal (ptrs) in a wireless communication system. the method by which a ue receives a ptrs in a wireless communication system, according to various embodiments, may comprise: acquiring a first cfr estimate value in a resource element (re) to which the ptrs has been allocated, by performing linear interpolation on the basis of two res to which a demodulation reference signal (dmrs) has been allocated; calculating an estimate value a cpe angle difference for the re to which the ptrs has been allocated; and on the basis of a second cfr estimate value acquired by applying the estimate value of the cpe angle difference to the first cfr estimate value, performing phase tracking of the re to which the ptrs has been allocated.
Abstract: provided is a receiver for receiving a signal including a symbol, the receiver including processing circuitry configured to generate a first log likelihood ratio corresponding to a bit included in the symbol based on a first log likelihood ratio calculation method, the first log likelihood ratio calculation method being a linear calculation method, generate a second log likelihood ratio corresponding to the bit based on a second log likelihood ratio calculation method, the second log likelihood ratio calculation method being a nonlinear calculation method, generate comparison data based on a result of comparing the first log likelihood ratio with the second log likelihood ratio, and generate a final log likelihood ratio corresponding to at least one of the first log likelihood ratio or the second log likelihood ratio based on the comparison data.
20250219896. NETWORK CONTROLLER METHOD NETWORK CONTROL (Samsung Electronics ., .)
Abstract: a network controller and operating method of the network controller are disclosed. the network controller includes, based on error information transmitted through a plurality of data link layers and a plurality of physical layers respectively corresponding to a plurality of ports managed by one transaction layer, a port monitor circuit configured to determine a number of valid ports among the plurality of ports by monitoring a status of the plurality of ports, a split circuit configured to split and transmit one packet to the valid ports based on the number of valid ports, and a reorder buffer configured to sort an order of second split packets, which are received from another network controller through the plurality of ports, and restore the second split packets received.
20250219956. ELECTRONIC DEVICE METHOD USING NETWORK SLICE STORAGE MEDIUM (Samsung Electronics ., .)
Abstract: an electronic device may store memory configured to store instructions. the electronic device may include at least one processor. the instructions may cause, when individually or collectively executed by the at least one processor, the electronic device to, based on result of inputting, into a traffic category classification model, first data associated with a traffic of a first application in a first data structure including a plurality of first time points and a plurality of first network parameter groups respectively corresponding to the plurality of first time points, identify that the traffic of the first application corresponds to a first category. the instructions may cause, when executed by at least the part of the at least one processor, the electronic device to perform at least one operation causing transmission and/or reception of a first traffic of the first application through a first data transmission path corresponding to the first category.
Abstract: an example electronic apparatus may include a display and at least one processor configured to identify whether or not the first external apparatus is in an out-of-box experience (oobe) state, if the first external apparatus is in the oobe state and the first external apparatus receives information regarding a second external apparatus, receive information regarding the first and second external apparatuses from the first external apparatus, authenticate whether the electronic apparatus has the authority to control or monitor the first external apparatus, if the authority is authenticated, control to transmit the information regarding the first external apparatus to a first server in order to perform onboarding on the first external apparatus, identify whether or not the second external apparatus is present around the electronic apparatus, and, if the second external apparatus is present, display a ui inquiring whether or not to perform onboarding on the second external apparatus.
20250220074. ELETRONIC DEVICE METHOD FORMING WI-FI PEER PEER (P2P) GROUP (Samsung Electronics ., .)
Abstract: an example method of forming a wi-fi p2p group of an electronic device includes obtaining information for wi-fi p2p connection to a second external electronic device while the electronic device forms a first p2p group with a first external electronic device through a wi-fi p2p connection and generating a second p2p group with the second external electronic device by obtaining a group owner (go) permission while maintaining the first p2p group based on the information and a role of the electronic device in the first p2p group.
20250220094. MULTI-FOLDABLE ELECTRONIC DEVICE (Samsung Electronics ., .)
Abstract: a foldable electronic device is provided. the foldable electronic device includes a first housing, a second housing, a third housing, a first folding unit configured to allow the first and second housings to be folded in a first folding manner, a second folding unit configured to allow the second and third housings to be folded in a second folding manner, a flexible display disposed across the first to third housings, and a metal plate disposed to face the flexible display to support the folding operation of the flexible display, and including a first folding area in which a first pattern is disposed and a second folding area in which a second pattern different from the first pattern is disposed.
20250220097. FLEXIBLE CIRCUIT BOARD ELECTRONIC DEVICE COMPRISING SAME (Samsung Electronics ., .)
Abstract: according to an embodiment of the disclosure, an electronic device may include a housing including a first housing and a second housing, a hinge structure configured to rotatably connect the first housing and the second housing, and a flexible circuit board at least partially disposed on the hinge structure, wherein the flexible circuit board includes a first area at least partially configured to be bendable, the first area including a first conductive layer, a (1-1)th coverlay layer stacked on the first conductive layer, and a (1-2)th coverlay layer stacked on the (1-1)th coverlay layer, and a second area configured to extend from the first area, the second area including a second conductive layer forming the same conductive layer as the first conductive layer, and a second coverlay layer forming the same coverlay layer as the (1-1)th coverlay layer. in addition, various embodiments may be possible.
20250220098. ELECTRONIC DEVICE COMPRISING HOUSING (Samsung Electronics ., .)
Abstract: in an electronic device comprising a housing, according to various embodiments of the present disclosure, the housing may comprise: an aluminum substrate; a thermal spray coating layer formed on the aluminum substrate and including a first region having a first thickness and a second region having a second thickness thinner than the first thickness; an oxide film layer formed on the thermal spray coating layer or the aluminum substrate; and a deposited film layer formed on at least a portion of the thermal spray coating layer.
Abstract: an electronic apparatus including a cooking chamber in which an inner chamber is rotatable, a camera, a memory, and at least one processor. the at least one processor is configured to, based on cooking being started, obtain a reference image of an inside of the cooking chamber, obtain a plurality of images of the inside of the cooking chamber at a preset time interval while the inner chamber rotates in a first direction, store the plurality of images in association with a rotation angle of the inner chamber at a time the plurality of images are captured, respectively, obtain a plurality of rotated images by rotating the plurality of images in a second direction, opposite to the first direction, by a rotation angle stored, obtain a plurality of cropped images based on the reference image, and provide a time-lapse video using the reference image and the plurality of cropped images.
20250220134. IMAGE PROCESSING DEVICE METHOD (Samsung Electronics ., .)
Abstract: an image processing device includes a channel interface, including a data channel, a vertical synchronization line, a horizontal synchronization line, and a data enable line, and a combiner configured to convert n pieces of first image data (where n is a positive integer greater than or equal to 2) into second image data having a different image format, time-divide and output the second image data to the data channel, output n vertical synchronization signals for the second image data to the vertical synchronization line, and output n data enable signals for the second image data to the horizontal synchronization line and the data enable line.
20250220143. PROJECTION DEVICE OPERATING METHOD THEREOF (Samsung Electronics ., .)
Abstract: a projection device for projecting an image, the projection device including a projector; a fisheye lens; memory; and at least one processor configured to generate a correction image that corrects distortion of an input image projected onto a screen through the fisheye lens, wherein the correction image is generated by calculating a plurality of reference locations, each calculated reference location of the plurality of calculated reference locations being based respectively on pixel coordinates of a pixel of a plurality of pixels of the generated correction image, and setting a pixel value of each pixel of the plurality of pixels of the generated correction image by referencing a pixel value of the input image corresponding to each respective calculated reference location of the plurality of calculated reference locations, and control the projector to project the generated correction image onto the screen through the fisheye lens.
20250220151. SYSTEM METHOD CORRECTING MAPPING DRIFT ELECTRONIC DEVICE (Samsung Electronics ., .)
Abstract: a method performed by an electronic device for correcting a mapping drift is provided. the method includes receiving, by the electronic device via one or more primary cameras of the electronic device, a first plurality of images associated with a scene, extracting, by the electronic device, a plurality of first feature points from each of the received first plurality of images, receiving, by the electronic device via one or more secondary cameras of the electronic device, a second plurality of images, extracting, by the electronic device, a plurality of second feature points from each of the received second plurality of images, wherein a field of view of the one or more secondary cameras overlaps with a field of view of the one or more primary cameras, computing, by the electronic device, a mapping drift in a primary map associated with the first plurality of images by comparing position coordinates of the extracted plurality of first feature points with position coordinates of the extracted plurality of second feature points, and correcting, by the electronic device, the mapping drift in the primary map based on the computed mapping drift.
Abstract: a method of decoding an image according to an embodiment includes: when a size of a current block in the image is equal to or greater than a certain size, determining a candidate list including, as a candidate, a first reference block indicated by a temporal motion vector; when the first reference block is selected from among candidates included in the candidate list, determining motion vectors of sub-blocks in the current block by using motion vectors obtained from the first reference block; and reconstructing the current block based on sample values of a second reference block indicated by the motion vectors of the sub-blocks.
Abstract: provided is a video decoding method including: determining an inter prediction mode of a current block when the current block is inter-predicted; determining at least one reference sample location to be referred to by the current block, based on the inter prediction mode of the current block; determining filter information to be applied to at least one reconstructed reference sample corresponding to the at least one reference sample location, based on the inter prediction mode of the current block; performing filtering on the at least one reconstructed reference sample, based on the filter information; and decoding the current block by using prediction samples generated via the filtering.
Abstract: an electronic device includes: at least one processor comprising processing circuitry; and memory, comprising one or more storage mediums, a decoder, a post-processing memory, a renderer, the memory being configured to store instructions, wherein the decoder is configured to decode a frame among a plurality of frames of a video stored in an input buffer, and to generate a decoded frame. the post-processing memory may post-process the decoded frame, and to generate a post-processed frame. the renderer may render the decoded frame or the post-processed frame stored in an output buffer. the instructions may cause the electronic device to: set the output buffer based on time required for a post-processing, and adjust a speed of inputting the plurality of frames into the input buffer based on a speed at which the rendered frame is played via a display.
20250220303. ELECTRONIC DEVICE METHOD CAMERA FOCUS CONTROL (Samsung Electronics ., .)
Abstract: a processor-implemented method includes obtaining an image comprising a target object, generating, from the image, a first channel image comprising first phase detection (pd) pixel values and a second channel image comprising second pd pixel values, determining a position of a lens to focus on the target object based on a focus determination model to which the first channel image and the second channel image are input, and controlling a camera according to the position of the lens, wherein the first channel image and the second channel image each comprise pd pixel values for detecting a phase difference in the image, and image pixel values comprising information on the image.
20250220316. IMAGE SENSOR ELECTRONIC DEVICE INCLUDING SAME (Samsung Electronics ., .)
Abstract: an image sensor includes a pixel array including a plurality of pixels arranged in a first direction and in a second direction; and a logic circuit configured to drive the plurality of pixels. the logic circuit is configured to: generate, based on pixel data corresponding to each of the plurality of pixels, first image data having a first resolution, after generating the first image data, to generate second image data having a second resolution based on binning pixel data corresponding to each of a plurality of binning pixels, the plurality of binning pixels binning two or more pixels adjacent to each other, among the plurality of pixels, the second resolution being lower than the first resolution; and output the first image data and the second image data. a first frames per second of the first image data is lower than a second frames per second of the second image data.
20250220329. ELECTRONIC DEVICE COMPRISING MIC MODULE (Samsung Electronics ., .)
Abstract: an electronic device according to an embodiment of the disclosure may include a housing including a front surface on which a display module is disposed, a rear surface opposite to the front surface, and a side surface which surrounds the front surface and the rear surface, a first acoustic hole formed on one side surface of the housing, a printed circuit board disposed in the housing, a slit extending in one direction at one end of the printed circuit board facing the first acoustic hole, and at least partially overlapping with the first acoustic hole when viewing the first acoustic hole from one side surface of the housing, and a microphone module including a microphone hole for receiving an external sound, and disposed on the printed circuit board so that the microphone hole is positioned in the slit. in addition, various embodiments may be also possible.
Abstract: an electronic device is provided. the electronic device includes a first microphone disposed on the left front surface of the electronic device to collect sound of a first input channel, a second microphone disposed on the left rear surface of the electronic device to collect sound of a second input channel, a third microphone disposed on the right front surface of the electronic device to collect sound of a third input channel, a fourth microphone disposed on the right rear surface of the electronic device to collect sound of a fourth input channel, memory storing one or more computer programs, and one or more processors communicatively coupled to the first microphone, the second microphone, the third microphone, the fourth microphone, and the memory, wherein the one or more computer programs include computer-executable instructions that, when executed by the one or more processors individually or collectively, cause the electronic device to preprocesses the sound of the first input channel, the sound of the second input channel, the sound of the third input channel, and the sound of the fourth input channel, and operate in a first mode that records immersive audio based on the preprocessed sound of the first input channel, the preprocessed sound of the second input channel, the preprocessed sound of the third input channel, and the preprocessed sound of the fourth input channel or operate in a second mode that receives a sound of a designated direction using beamforming based on the preprocessed sound of the first input channel, the preprocessed sound of the second input channel, the preprocessed sound of the third input channel, and the preprocessed sound of the fourth input channel.
Abstract: provided is a method and device for displaying a position of a first device on a second device. the method includes: detecting, by a device using a uwb chip, position coordinates in a first coordinate system of the first device with respect to a position of the device; converting, by the device, the position coordinates of the first device in the first coordinate system into position coordinates of the first device in a global coordinate system; converting, by the device, the position coordinates of the first device in the global coordinate system into position coordinates of the first device in a user coordinate system; transmitting the converted position coordinates of the first device in the user coordinate system to the second device; and displaying the position of the first device on the second device based on the converted position coordinates of the first device in the user coordinate system.
20250220409. ELECTRONIC DEVICE NAN COMMUNICATION METHOD (Samsung Electronics ., .)
Abstract: an electronic device may include one or more wireless communication modules including: a first communication module supporting an nan protocol; and a second communication module using a frequency band different from that of the first communication module. the electronic device may comprise one or more processors, including processing circuitry, operatively connected to the one or more wireless communication modules. the electronic device may comprise a memory configured to store instructions. the instructions are executed individually and/or collectively, by the one or more processors, to cause the electronic device to transmit or receive, via the first communication module, data to or from an external electronic device included in a nan cluster along with the electronic device. the instructions are executed individually and/or collectively, by the one or more processors, to cause the electronic device to transmit associated information about the nan cluster to the external electronic device after the data transmission and reception operation supported via the first communication module ends. the instructions are executed individually and/or collectively, by the one or more processors, to cause the electronic device to hand off the associated information about the nan cluster from the first communication module to the second communication module. the instructions are executed individually and/or collectively, by the one or more processors, to cause the electronic device to maintain the nan cluster on the basis of the associated information about the nan cluster via the second communication module. various other embodiments may be possible.
Abstract: an electronic device is provided. the electronic device includes at least one communication module, memory storing biometric information of a user, a bio-hash corresponding to the biometric information, and one or more computer programs, and one or more processors communicatively coupled to the at least one communication module and the memory, wherein the one or more computer programs include computer-executable instructions that, when executed by the one or more processors individually or collectively, cause the electronic device to receive, from an external device, a message containing at least one of a pass code pair and device information of the external device through the at least one communication module, authenticate a pass code associated with the external device by using the bio-hash stored in the memory and the pass code pair, transmit, based on an authentication result, device information of the electronic device to the external device, and connect, based on a request from the external device, to the external device via the at least one communication module.
20250220461. USER EQUIPMENT BAND SELECTION CELLULAR PERFORMANCE (Samsung Electronics ., .)
Abstract: a user equipment (ue) includes a transceiver, and a processor operatively coupled to the transceiver. the processor is configured to detect an occurrent of an event, and determine whether the event is a qualifying event. the processor is also configured to, in response to a determination that the event is a qualifying event, identify, based on a band map and a present location of the ue, an event improvement procedure, and perform the event improvement procedure.
Abstract: in embodiments, a session management device includes at least one transceiver, and at least one processor coupled to the at least one transceiver. the at least one processor is configured to obtain prediction information for a residence time of a user equipment (ue) per a service area of each user plane function (upf), based on mobility information of the ue. the at least one processor is configured to identify a packet data unit (pdu) session anchor (psa) upf for the ue based on the prediction information. the at least one processor is configured to, based on identifying an event according to a movement of the ue, identify whether a upf corresponding to the service area in which the ue is located is the psa upf for the ue. the at least one processor is configured to, based on identifying that the upf is the psa upf for the ue, perform a psa change to the upf.
20250220529. UE INITIATED LOWER LAYER TRIGGERED MOBILITY (Samsung Electronics ., .)
Abstract: a user equipment (ue) includes a transceiver configured to receive, from a source cell, a physical downlink control channel (pdcch) order for a first ue initiated lower layer triggered mobility (ltm) candidate cell, and transmit, to the first ltm candidate cell, during a random access procedure initiated by the pdcch order, a random access preamble. the transceiver is also configured to receive, from the source cell, after completion of the random access procedure, a medium access control (mac) control element (ce) including timing advance (ta) information of the first ltm candidate cell. the ue also includes a processor operatively coupled to the transceiver. the processor is configured to store the ta information of the first ltm candidate cell, and start a candidate timing alignment timer (tat) for the first ltm candidate cell.
20250220543. RADIO LINK FAILURE REPORTING LOWER LAYER TRIGGERED MOBILITY (Samsung Electronics ., .)
Abstract: a user equipment includes a transceiver, and a processor operatively coupled to the transceiver. the transceiver is configured to receive, from a source cell, a conditional lower layer triggered mobility (ltm) configuration for at least one conditional ltm candidate cells. the processor is configured to initiate execution of a conditional ltm cell switch towards a target cell of the at least one conditional ltm candidate cells, determine that the conditional ltm cell switch towards the target cell has failed, and in response to the determination that the conditional ltm cell switch towards the target cell has failed, generate a radio link failure (rlf) report.
20250220544. LOW LAYER TRIGGERED MOBILITY SIDE INFORMATION (Samsung Electronics ., .)
Abstract: a user equipment (ue) includes a transceiver configured to receive a configuration message including a plurality of candidate cells for low layer triggered mobility (ltm) handover (ho). the ue further includes a processor operatively coupled to the transceiver. the processor is configured to determine, based on side information and the plurality of candidate cells, a plurality of cells for performing early-sync, and perform early-sync with the determined plurality of cells for performing early-sync. the transceiver is further configured to receive a message including a command to perform an ltm ho to a target cell. the processer is further configured to perform the ltm ho to the target cell, and update the side information based on the ltm ho.
20250220554. APPARATUS METHOD ENHANCING SATELLITE COMMUNICATION (Samsung Electronics ., .)
Abstract: the disclosure relates to a 5g or 6g communication system for supporting a higher data transmission rate. according to an embodiment, the method comprises identifying one or more parameters associated with discontinuous coverage: determining, based on the one or more parameters associated with discontinuous coverage, a user equipment (ue) out-of-coverage period; and in case of determining the ue-out-of-coverage period, transmitting to the ue a signal including an extended connected time parameter, wherein the ue is maintained in a connected mode for the extended connected time parameter.
Abstract: the disclosure relates to a 5g or 6g communication system for supporting a higher data transmission rate. the present disclosure provides a method performed by a network function (nf) for network slice access control in a wireless communication system. the method includes transmitting, to a network slice admission control function (nsacf), an event exposure subscribe message including information about a status of single network slice selection assistance information (s-nssai), receiving, from the nsacf, an event exposure subscribe response message indicating the result about subscription, receiving, from the nsacf, an event exposure notify message including information about event information.
20250220556. BEACON SPLITTING (Samsung Electronics ., .)
Abstract: an access point (ap) in a wireless network determines a parent beacon and transmits two beacon frames. the first beacon frame comprises a first portion of information of the parent beacon. the second beacon frame comprises a second portion of information of the parent beacon. the ap may transmit more than two beacon frames where each beacon frame comprises a portion of information of the parent beacon.
20250220560. SYSTEM METHOD MANAGING ENTRY PLMN LIST USER EQUIPMENT (Samsung Electronics ., .)
Abstract: the disclosure relates to a 5g or 6g communication system for supporting a higher data transmission rate. the method disclosed herein includes triggering a timer of a predefined-time period for an entry of one or more plmn-ids associated with one or more plmns in the plmn list. the method includes detecting an occurrence of a switch-on operation of the ue subsequent to an occurrence of a switch-off operation of the ue. the method includes calculating a remaining time of the timer at a time of the occurrence of the switch-off operation and determining an elapsed time between the switch-off operation of the ue and the switch-on operation of the ue. the method includes comparing the calculated remaining time and the determined elapsed time and managing the entry of the one or more plmn-ids in the plmn list.
Abstract: the disclosure relates to a fifth generation (5g) or sixth generation (6g) communication system for supporting higher data rates. a method of processing a control signal in a wireless communication system includes receiving a first control signal transmitted from a bs, processing the received first control signal, and transmitting, to the bs, a second control signal generated based on the processing.
Abstract: the disclosure relates to a 5g or 6g communication system for supporting a higher data transmission rate. a communication method and apparatus in a wireless communication system are provided. the communication method includes determining a mode of a terminal and/or a base station; and performing at least one of transmitting an uplink channel, receiving a downlink channel, not transmitting an uplink channel, or not receiving a downlink channel based on the determined mode. the invention can ensure the network performance while save the energy consumption of network devices.
Abstract: provided are a user equipment and an operation method of a wireless communication system including the user equipment, the user equipment allowing power consumption of a network (or base station) to be reduced by determining whether internal noise among noise components of the user equipment is a dominant factor, based on capability information of the user equipment, and, when the internal noise is a dominant factor, performing a power adjustment operation that adjusts transmission power of at least one of signals or channels to be transmitted to the user equipment. an operation method of a wireless communication system includes receiving capability information including a determination parameter, determining whether internal noise among noise components of a user equipment is a dominant factor, based on the determination parameter, and, when the internal noise is determined to be a dominant factor, performing a power adjustment operation that adjusts transmission power.
20250220591. PATH-LOSS DETERMINATION MULTI-TRP OPERATION (Samsung Electronics ., .)
Abstract: methods and apparatuses for path-loss determination for multi-transmit-receive point (trp) operation. a method performed by a user equipment (ue) includes receiving a first list of one or more path-loss offsets (plos) in a radio resource control (rrc) configuration, receiving first information related to a first path-loss (pl), and receiving second information related to a plo. the method further includes determining the first pl based on the first information; determining the plo based on the first list and the second information, determining a second pl based on the first pl and the determined plo; and determining an uplink (ul) power control parameter based on the first pl or the second pl. the first information includes at least a pl reference signal (rs) index.
Abstract: a method of a reference user equipment (ue) for performing ranging with a target ue in a wireless communications system. the method comprises receiving from a requesting entity, a request for a ranging service with the target ue; performing ranging with the target ue; and transmitting to the requesting entity, a report of a result of the ranging, wherein the request is received from the requesting entity via one or more of a gateway mobile location centre (gmlc) and a location management function (lmf) of the wireless communications system and the report is transmitted to the requesting entity via one or more of the gmlm and lmf.
Abstract: a user equipment supporting a first positioning function may include a transceiver configured to receive first wireless signals from a base station at a first position of the user equipment, and a first processor configured to control the transceiver, wherein the first processor is configured to, based on the first wireless signals, generate first values of a plurality of first indicators, and perform an operation according to the first positioning function of determining based on the first values whether the first position corresponds to a first specific position.
20250220654. METHOD APPARATUS RESOURCE ALLOCATION AMBIENT INTERNET THINGS (Samsung Electronics ., .)
Abstract: an apparatus and a method are disclosed for resource allocation in ambient iot systems. a method performed by a first device in an ambient iot system includes activating as a cluster head for ambient iot devices, in response to a first condition being met; transmitting a first energizing signal to the ambient iot devices on a first carrier frequency; transmitting an advertisement signal to the ambient iot devices; and receiving, from a first ambient iot device among the ambient iot devices, a first backscattered signal based on the first energizing signal and the advertisement signal.
20250220680. METHOD DEVICE PDCCH REPETITION MULTI-TRP SYSTEM (Samsung Electronics ., .)
Abstract: a method and a user equipment (ue) are provided for explicitly linking repeated physical downlink control channels (pdcchs). the ue receives the repeated pdcchs from a network. each of the repeated pdcchs include downlink control information (dci) that schedules reception of a same physical downlink shared channel (pdsch) at the ue. the ue links the repeated pdcchs having common pdcch candidate numbers across search space (ss) sets of a control resource set (coreset). the repeated pdcchs are received in accordance with the ue and the network communicating using a multi-transmission and reception point (trp) repetition scheme or a multi-trp multi-chance scheme.
20250220705. SENSING OPERATIONS SIDELINK COMMUNICATIONS (Samsung Electronics ., .)
Abstract: methods and apparatuses for adaptive low-power sensing operations for sidelink (sl) communications in a wireless communication system. a method of operating a user equipment (ue) includes operating with partial sensing; operating in a resource pool configured for the partial sensing; and triggering for a sl resource selection in a slot n. the method further includes selecting y candidate slots for the sl resource selection and performing, in a sensing window, a contiguous partial sensing (cps). a first of the selected y candidate slots is a slot t′. the sensing window is in contiguous slots within the resource pool relative to the slot t′.
Abstract: the disclosure relates to an electronic device providing a communication function based on a network environment and a method for operating the same. the electronic device may obtain state information about a plurality of community terminals included in a predetermined community group and, in response to a first community terminal included in the plurality of community terminals being selected as a call target object, output a first state notification message indicating a state of the first community terminal based on the state information. the electronic device may determine a second community terminal among the plurality of community terminals based on the state information in response to a replacement request event for requesting to replace the call target object with another community terminal being triggered, and output a second state notification message indicating a state of the second community terminal based on the state information.
20250220764. METHOD DEVICE SUPPORTING QOE MOBILE COMMUNICATION SYSTEM (Samsung Electronics ., .)
Abstract: the present invention relates to a method comprising the steps of: receiving a first radio resource control (rrc) message including at least one piece of quality of experience (qoe) configuration information, and information indicating that the at least one piece of qoe configuration information is related to one piece of signaling-based qoe configuration information; receiving a second rrc message for releasing an rrc connection; measuring qoe on the basis of the at least one piece of qoe configuration information; and transmitting, once a terminal in an rrc idle state or in an rrc inactive state is connected to a base station, a third rrc message including signaling-based information relating to qoe to the base station.
Abstract: the disclosure relates to a 5g or 6g communication system for supporting a higher data transmission rate. embodiments herein provide a method for randomizing signalling during a discontinuous coverage area in a satellite access apparatus by a ue. the method includes registering the ue to the satellite access apparatus through a satellite access network. further, the method includes receiving a discontinuous coverage wait range from the satellite access network. further, the method includes detecting a discontinuous coverage in the satellite access apparatus. further, the method includes determining a random wait time within the discontinuous coverage wait range. further, the method includes starting a wait timer configured with the determined random wait time based on the determination, when the ue returns to coverage after being out of coverage on the satellite access apparatus and waiting for the expiry or stop of the wait timer to initiate an access stratum (as) signalling or a non-access stratum (nas) signalling on the satellite access network.
Abstract: a method of operating a user device wirelessly communicating with a non-terrestrial communication device includes transmitting a first message including a plurality of random access preambles to the non-terrestrial communication device, setting a power management device of the user device to a first discontinuous reception mode, during a first communication wait interval between a first time point, at which the last random access preamble among the plurality of random access preambles is transmitted, and a second time point at which a reception window interval starts, and receiving a second message corresponding to the first message from the non-terrestrial communication device, during the reception window interval.
Abstract: the present disclosure relates to a communication method and device enabling information sharing between multiple smfs in a wireless communication system for supporting virtual network (vn) group communication. a method performed by a first smf for managing a session of a terminal in a wireless communication system for supporting vn group communication according to an embodiment of the present disclosure comprises the steps of: receiving, through an amf that manages the mobility of the terminal, a pdu session establishment request message having been transmitted from the terminal and including identification information indicating the vn group communication; transmitting a request message including the identification information to a udm that manages subscription information; receiving information about multiple smfs enabling information sharing for the vn group communication from the udm; and performing session management for the vn group communication through the information sharing with a second smf among the multiple smfs.
Abstract: provided is an induction heating device configured to output, to an inverter, an inverter control signal for controlling the inverter, obtain a detection signal corresponding to a detected alternating current, measure, as an actual phase, a delay in an input time point at which the detection signal corresponding to the inverter control signal is obtained relative to an output time point at which the inverter control signal is output, calculate, based on the inverter control signal, a reference phase including a delay in the input time point relative to the output time point in a state where the object to be heated is misaligned above the heating coil, calculate a threshold by subtracting a predetermined offset from the reference phase, and determine whether the object to be heated is misaligned above the heating coil by comparing the actual phase with the threshold.
Abstract: an electronic device includes a housing and a flexible printed circuit board (fpcb) transmitting a signal, the fpcb connecting electronic components disposed in the housing. the fpcb includes a non-conductive layer, a first conductive layer including a transmission line disposed on one side of the non-conductive layer configured to transmit the signal, and a second conductive layer disposed on another side opposite to one side of the non-conductive layer, wherein a thickness of the non-conductive layer is in a range of 3.5 um to 7.5 um and configured to electrically separate the transmission line and the second conductive layer.
Abstract: a stacked structure includes a plurality of amorphous material layers each having a first dielectric constant and a first thickness, and an intermediate layer disposed between the plurality of amorphous material layers and having a second dielectric constant and a second thickness less than the first thickness, wherein the first dielectric constant may be 2.5 or less, a difference between the first dielectric constant and the second dielectric constant may be less than or equal to twice the first dielectric constant, and an overall dielectric constant of the stacked structure may be 2.5 or less.
Abstract: a storage device comprising: a main storage module; and an extension storage module comprising: a substrate; a functional block on the substrate, wherein the functional block is configured to provide a first function for the main storage module; a control circuit on the substrate, wherein the control circuit is configured to control the functional block; a housing that extends around the substrate, the functional block, and the control circuit; and a connector that is connected to the substrate, wherein the connector is configured to provide an electrical connection and a physical connection between the extension storage module and the main storage module, wherein the extension storage module is electrically and physically attachable to and detachable from the main storage module through the connector, and wherein in response to the extension storage module being detached from the main storage module, the main storage module has a first form factor.
20250220838. ELECTRONIC DEVICE INCLUDING MOLDING PART (Samsung Electronics ., .)
Abstract: an electronic device is provided. the electronic device includes a housing, a display placed in the housing, and a molding part provided at an end portion of the display, wherein the display includes a panel layer including a bending area in at least a portion of an end portion, and a protective layer disposed on the panel layer, wherein the protective layer includes a first concave area where at least a portion of an end portion of the protective layer is formed concavely, and wherein the molding part is disposed to fill the first concave area.
20250220854. ELECTRONIC DEVICE INCLUDING HEAT DISSIPATION MEMBER (Samsung Electronics ., .)
Abstract: the disclosure relates to an electronic device. according to an embodiment of the disclosure, the electronic device may include a first substrate including a first surface and a second surface opposite to the first surface, a second substrate including a third surface facing the first surface and a fourth surface opposite to the third surface, at least one interposer between the first surface and the second surface, a first electronic component on the fourth surface, and a heat dissipation member which is in a solid phase at room temperature and is in a space defined by the first substrate, the second substrate, and the at least one interposer so as to overlap with the first electronic component when viewed in a direction perpendicular to the fourth surface.
20250220872. SEMICONDUCTOR DEVICE (Samsung Electronics ., .)
Abstract: a semiconductor device may include a pass transistor on a first surface of the substrate, a pulldown transistor sharing an active region with the pass transistor, a pullup transistor sharing a gate with the pulldown transistor, a wordline connected to a gate of the pass transistor, a bitline connected to a drain of the pass transistor, a first power wiring on a second surface of the substrate and connected to a source of the pulldown transistor, and a second power wiring connected to a source of the pullup transistor. a source of the pass transistor and drains of the pulldown and pullup transistors may be connected through one node. the wordline, the bitline, and the second power wiring may be on the first surface of the substrate. a first portion the first power wiring may extend in a direction parallel to a gate of the pass transistor.
20250220873. SEMICONDUCTOR DEVICE STACK SEMICONDUCTOR CHIPS (Samsung Electronics ., .)
Abstract: a semiconductor device includes a substrate including a logic cell region and a connection region, a dummy transistor on the connection region, an intermediate connection layer on the dummy transistor, the intermediate connection layer including a connection pattern electrically connected to the dummy transistor, a first metal layer on the intermediate connection layer, an etch stop layer between the intermediate connection layer and the first metal layer, the etch stop layer covering a top surface of the connection pattern, and a penetration contact extended from the first metal layer toward a bottom surface of the substrate penetrating the connection region.
20250220874. SEMICONDUCTOR DEVICE STACK SEMICONDUCTOR CHIPS (Samsung Electronics ., .)
Abstract: a semiconductor device includes a substrate including a logic cell region and a connection region, a dummy transistor on the connection region, an intermediate connection layer on the dummy transistor, the intermediate connection layer including a connection pattern electrically connected to the dummy transistor, a first metal layer on the intermediate connection layer, an etch stop layer between the intermediate connection layer and the first metal layer, the etch stop layer covering a top surface of the connection pattern, and a penetration contact extended from the first metal layer toward a bottom surface of the substrate penetrating the connection region.
Abstract: a semiconductor memory device may include first and second bit lines spaced apart from each other, an interlayer insulating layer covering the first and second bit lines and including a groove extending to cross both of the first and second bit lines, a first channel pattern connected to the first bit line and in contact with an inner side surface of the groove and covering a top surface of the interlayer insulating layer, a second channel pattern connected to the second bit line and in contact with an opposite inner side surface of the groove and covering the top surface of the interlayer insulating layer, a word line in the groove, first and second electrodes on the interlayer insulating layer and in contact with the first and second channel patterns, respectively, and a dielectric layer between the first and second electrodes.
20250220876. SEMICONDUCTOR DEVICE METHOD MANUFACTURING SAME (Samsung Electronics ., .)
Abstract: an embodiment provides a semiconductor device including: a substrate; a bit line disposed on the substrate; an insulating pattern disposed on the bit line; a channel pattern disposed on the bit line and extending in a vertical direction substantially perpendicular to a surface of the substrate along an upper surface of the bit line and a sidewall of the insulating pattern; a dummy pattern disposed between the insulating pattern and the channel pattern; a word line that intersects the bit line and is spaced apart from the channel pattern; a gate insulating pattern disposed between the channel pattern and the word line; and a landing pad connected to the channel pattern.
Abstract: a vertically stacked memory device includes a plurality of bit lines extending in a first direction, a plurality of oxide semiconductor layers including a plurality of oxide semiconductor layer sets each including one or more oxide semiconductor layers connected to a separate, respective bit line of the plurality of bit lines and extending in a second direction, the second direction intersecting with the first direction, a plurality of capacitors electrically connected to separate, respective oxide semiconductor layers of the plurality of oxide semiconductor layers, and a plurality of word lines extending to intersect with the plurality of oxide semiconductor layers in a third direction intersecting with both the first direction and the second direction, wherein each oxide semiconductor layer includes an oxide semiconductor material in which a proportion of tin (sn) among all metals therein is about 50 at % or more to about 100 at % or less.
20250220885. SEMICONDUCTOR DEVICES (Samsung Electronics ., .)
Abstract: a semiconductor device includes a peripheral circuit, a capacitor structure on the peripheral circuit and including a plate electrode and a vertical structure extending on the plate electrode in a vertical direction, the vertical structure including a first electrode, a second electrode, and a capacitor dielectric layer between the first and second electrodes, a cell transistor electrically connected to the capacitor structure, a first cell plug between, in the vertical direction, the plate electrode and the peripheral circuit and adjacent and electrically connected to a bottom surface of the plate electrode, and a second cell plug between, in the vertical direction, the cell transistor and the peripheral circuit, the first cell plug including a first end portion adjacent the peripheral circuit and a second end portion opposite to the first end portion, a width of the second end portion being greater than a width of the first end portion.
20250220890. SEMICONDUCTOR DEVICE METHOD MANUFACTURING SAME (Samsung Electronics ., .)
Abstract: a semiconductor device includes first and second active patterns adjacent to each other in a first direction, each of the first and second active patterns including first and second edge portions spaced apart from each other, a word line crossing between the first and second edge portions of each of the first and second active patterns and extending in a wave shape in the first direction, a bit line on the first edge portion of the first active pattern, and a storage node contact on the second edge portion of the first active pattern, wherein the first active pattern extends in a second direction intersecting the first direction, and the second active pattern extends in a third direction that is symmetrical to the second direction with respect to the first direction.
Abstract: a memory device includes a bit line extending in a first direction, an oxide semiconductor layer extending in a second direction intersecting the first direction and connected to the bit line, the oxide semiconductor layer comprising a source region, a drain region, and a channel region between the source region and the drain region, a capacitor electrically connected to the oxide semiconductor layer, a word line extending to intersect the oxide semiconductor layer in a third direction intersecting the first direction and the second direction, a first insulator on both side surfaces of the source region and the drain region in the third direction, and a second insulator different from the first insulator and on both sides of the channel region in the third direction.
20250220893. SEMICONDUCTOR MEMORY DEVICE (Samsung Electronics ., .)
Abstract: a semiconductor device including a peri-gate structure, a shielding conductive pattern on the peri-gate structure including shielding line patterns extending in a first direction, bit lines between the shielding line patterns on the peri-gate structure, first and second active patterns on the bit line, a back gate electrode on the bit line and the shielding conductive pattern between the first and second active patterns, first and second word lines adjacent to the first and second active patterns, and a data storage pattern on the first and second active pattern, and connected to the first and second active pattern, the bit line includes a first and second portion of the bit line, the first portion of the bit line overlaps the shielding line pattern in the second direction, and the second portion of the bit line does not overlap the shielding line pattern in the second direction.
20250220894. SEMICONDUCTOR MEMORY DEVICE (Samsung Electronics ., .)
Abstract: a semiconductor memory device is provided. the device includes a cell structure, a peripheral structure, and an interconnection structure sequentially stacked on a support substrate, in which the cell structure includes lower electrodes, a dielectric layer and an upper electrode with the dielectric layer and the upper electrode sequentially covering the lower electrodes, the peripheral structure includes a peripheral substrate and transistors disposed on a front surface of the peripheral substrate, and an upper surface of the upper electrode faces a back surface of the peripheral substrate.
20250220895. SEMICONDUCTOR MEMORY DEVICE (Samsung Electronics ., .)
Abstract: a semiconductor memory device with a cell over periphery (cop) structure, which includes a first semiconductor structure, and a second semiconductor structure disposed on a lower side of the first semiconductor structure. the first semiconductor structure includes a memory region, a first region, a memory cell array disposed in the memory region and including vertical channel transistors, and first peripheral circuits disposed in the first region and including vertical channel transistors or horizontal channel transistors. the second semiconductor structure includes a second region, a third region, second peripheral circuits disposed in the second region, which is on a lower side of the first region, and including horizontal channel transistors, and third peripheral circuits disposed in the third region, which is on a lower side of the memory region, and including horizontal channel transistors.
20250220897. SEMICONDUCTOR DEVICE ELECTRONIC SYSTEM INCLUDING SAME (Samsung Electronics ., .)
Abstract: a semiconductor device includes a substrate including a cell array region and a connection region, a plurality of ground selection gate patterns spaced apart from each other, a plurality of cell gate patterns vertically stacked on the plurality of ground selection gate patterns, separation structures vertically extending into the cell gate patterns and disposed between the plurality of ground selection gate patterns and spaced apart from each other in a first direction in the connection region, and dummy vertical structures disposed between the separation structures that are adjacent in the first direction and between a first ground selection gate pattern and a second ground selection gate pattern adjacent to the first ground selection gate pattern. each of the dummy vertical structures includes a vertical portion that vertically extends into the cell gate patterns and an extension that protrudes horizontally from the vertical portion.
20250220899. SEMICONDUCTOR DEVICES ELECTRONIC SYSTEMS INCLUDING SAME (Samsung Electronics ., .)
Abstract: a semiconductor device may include a plurality of gate lines including a first gate line and a second gate line arranged over the first gate line, a plurality of insulating layers respectively arranged between the plurality of gate lines, a plurality of channel structures penetrating the plurality of gate lines in a vertical direction that is perpendicular to an upper surface of the substrate, and a separation pattern overlapping at least a portion of the plurality of channel structures in the vertical direction. the separation pattern may penetrate at least a portion of the second gate line and at least a portion of a first channel structure of the plurality of channel structures. the first channel structure may overlap the separation pattern in the vertical direction. the second gate line may be filled completely with a conductive material.
Abstract: a semiconductor device includes a substrate having a first active region, a second active region, and a third active region, a first transistor on the first active region and including a first gate structure, which includes a first gate insulating layer and a first gate electrode, a second transistor on the second active region and including a second gate structure, which includes a second gate insulating layer including a high dielectric layer, a work function metal layer, and a second gate electrode, and a third transistor on the third active region and including a third gate structure, which includes a third gate insulating layer including a high dielectric layer, a work function metal layer, and a third gate electrode, wherein the first gate electrode includes a first semiconductor layer and a second semiconductor layer that are sequentially arranged on the first gate insulating layer and each include polysilicon.
20250220901. SEMICONDUCTOR MEMORY DEVICE ELECTRONIC SYSTEM INCLUDING SAME (Samsung Electronics ., .)
Abstract: a semiconductor memory device includes a cell substrate; a mold structure which includes word lines, a voltage bias film, and a string selection line stacked sequentially on the cell substrate; a channel hole which penetrates the mold structure; and a channel structure inside the channel hole, wherein the channel hole includes a first portion penetrating the word line, a second portion penetrating the voltage bias film, and a third portion penetrating the string selection line, a width of a lowermost part of the second portion is greater than a width of an uppermost part of the first portion, and a width of an uppermost part of the second portion is greater than a width of a lowermost part of the third portion.
Abstract: a three-dimensional (3d) semiconductor memory device includes a substrate, a stack on the substrate, the stack including gate electrodes stacked in a first direction perpendicular to a bottom surface of the substrate, a cell vertical structure penetrating the stack and extending in the second direction, a source layer on a top surface of the stack, a back-gate electrode in the cell vertical structure and extending in the first direction, and a channel pad at a level lower than a bottom surface of the source layer and enclosed by the cell vertical structure, where the back-gate electrode is spaced apart from the channel pad.
20250220904. SEMICONDUCTOR DEVICE (Samsung Electronics ., .)
Abstract: a semiconductor device includes a peripheral circuit structure and a cell structure that includes: gate electrodes extending in a first direction and spaced apart from each other in a second direction, where the gate electrodes define a channel hole extending in the second direction, a channel layer including a first region and a second region, a common source layer electrically connected to the second region of the channel layer, an upper insulating layer on the common source layer, where the upper insulating layer, the common source layer, and the second region of the channel layer define a back gate hole extending in the second direction, a back gate insulating layer on the channel hole and the back gate hole, and a back gate electrode that is in the channel hole and the back gate hole and is on the back gate insulating layer.
20250220905. SEMICONDUCTOR DEVICE ELECTRONIC SYSTEM INCLUDING SAME (Samsung Electronics ., .)
Abstract: a semiconductor device, including: a plurality of gate lines spaced apart in a vertical direction around a vertical hole; a channel layer extending in the vertical hole; a composite dielectric layer between the plurality of gate lines and the channel layer and comprising a channel-side dielectric layer, a ferroelectric layer, and a boundary dielectric layer sequentially stacked in a direction toward the plurality of gate lines from the channel layer; and a gap-fill insulation pattern between the plurality of gate lines, wherein the boundary dielectric layer comprises a plurality of boundary dielectric patterns spaced apart in the vertical direction and facing the plurality of gate lines, and wherein a first height corresponding to a length of each boundary dielectric pattern in the vertical direction is less than a second height corresponding to a length of each gate line in the vertical direction.
20250220907. SEMICONDUCTOR DEVICES DATA STORAGE SYSTEMS INCLUDING SAME (Samsung Electronics ., .)
Abstract: a semiconductor device includes a semiconductor structure that includes a substrate having a first region and a second region, gate electrodes stacked and spaced apart from each other in a first direction, extend at different lengths in a second direction on the second region, and include pad regions, interlayer insulating layers alternately stacked with the gate electrodes, channel structures penetrating the gate electrodes, extending in the first direction, and each including a channel layer, contact plugs penetrating the pad regions and extending in the first direction on the second region, and contact insulating layers between the gate electrodes and between ones of the contact plugs below the pad regions. the pad regions and the contact insulating layers protrude from the interlayer insulating layers toward the contact plugs in a horizontal direction.
20250220914. INTEGRATED CIRCUIT DEVICE ELECTRONIC SYSTEM INCLUDING SAME (Samsung Electronics ., .)
Abstract: an integrated circuit device includes a substrate, a channel area arranged in the substrate, a gate structure arranged on the channel area and including a gate dielectric layer, a gate electrode, and a gate capping layer which are sequentially stacked, and first and second gate spacers on first and second respective opposite side walls of the gate dielectric layer, the gate electrode, and the gate capping layer, a source area and a drain area arranged at opposite sides of the channel area, a source contact contacting the source area, a resistance structure contacting the drain area and including doped polysilicon, and a drain contact contacting the resistance structure and including metal.
Abstract: a semiconductor device including a substrate, a gate stacked structure including a plurality of interlayer insulating layers and a plurality of gate electrodes alternately stacked on the substrate, a channel structure extending along a first direction through the gate stacked structure and connected to the substrate, a plurality of conductive patterns surrounding the channel structure and spaced apart from each other at different levels along the first direction, and a plurality of ferroelectric patterns spaced apart from each other and respectively surrounding the conductive patterns at each of the different levels along the first direction. at each of the different levels along the first direction, a ferroelectric pattern is disposed between a conductive pattern and a gate electrode in a radial direction of the channel structure, and a thickness of the ferroelectric pattern in the first direction is thinner than a thickness in the first direction of the gate electrode.
20250220917. SEMICONDUCTOR DEVICE (Samsung Electronics ., .)
Abstract: a semiconductor device includes first conductive lines provided on a substrate and spaced apart from each other in a first direction perpendicular to a top surface of the substrate, second conductive lines spaced apart from the first conductive lines in a second direction parallel to the top surface of the substrate, a gate electrode disposed between the first and second conductive lines and extended in the first direction, a plurality of channel patterns provided to enclose a side surface of the gate electrode and spaced apart from each other in the first direction, a ferroelectric pattern between each of the channel patterns and the gate electrode, and a gate insulating pattern between each of the channel patterns and the ferroelectric pattern. each of the channel patterns is connected to a corresponding one of the first conductive lines and a corresponding one of the second conductive lines.
20250220928. SEMICONDUCTOR DEVICE POWER GATING ELEMENT (Samsung Electronics ., .)
Abstract: a semiconductor device includes a first semiconductor chip that includes a semiconductor substrate which includes a plurality of circuit elements and a wiring structure which is disposed on the semiconductor substrate, and the wiring structure includes a plurality of wiring layers and one or more power gating elements disposed in the plurality of wiring layers, and the power gating elements are transistors including channel portions, gate electrodes, source electrodes, and drain electrodes, and the channel portions include a two-dimensional semiconductor material.
20250220929. SEMICONDUCTOR DEVICES (Samsung Electronics ., .)
Abstract: a semiconductor device includes a first chip structure; and a second chip structure on the first chip structure. the first chip structure includes a base substrate, a memory structure on the base substrate, a first substrate on the memory structure, first through-vias penetrating the first substrate, a first wiring structure disposed on the first substrate; first bonding pads on an upper surface of the first wiring structure, and a hydrogen-containing insulating layer disposed in a region adjacent to the memory structure in the first chip structure. the second chip structure includes a second substrate, peripheral circuit transistors and a lower wiring structure disposed on a lower surface of the second substrate; second bonding pads electrically connected to the lower wiring layer, and bonded to the first bonding pads, respectively; and an upper wiring structure.
20250220930. INTEGRATED CIRCUITS INCLUDING POLYSILICON RESISTORS (Samsung Electronics ., .)
Abstract: an integrated circuit includes active regions on an upper surface of a semiconductor substrate and having no electrical connection on the semiconductor substrate, an isolation layer on the upper surface of the semiconductor substrate and defining the active regions, and polysilicon resistors on the active regions and the isolation layer. the polysilicon resistors extend in a second direction that is perpendicular to a first direction in which the active regions extend, and are configured such that the number of active regions overlapping each of the polysilicon resistors in a vertical direction is identical.
20250220931. CAPACITOR SEMICONDUCTOR DEVICE INCLUDING SAME (Samsung Electronics ., .)
Abstract: a capacitor includes a first electrode including a first reinforcement material having a perovskite crystal structure; and a first metallic material having a perovskite crystal structure; a second electrode on the first electrode; and a dielectric layer between the first electrode and the second electrode, wherein the first metallic material has greater a greater electronegativity than that of the first reinforcement material.
Abstract: provided are a capacitor, an electronic device including the same, and a method of manufacturing the same, the capacitor including a first thin-film electrode layer; a second thin-film electrode layer; a dielectric layer between the first thin-film electrode layer and the second thin-film electrode layer; and an interlayer between the dielectric and at least one of the first thin-film electrode layer or the second thin-film electrode layer, the interlayer including a same crystal structure type as and a different composition from at least one of the first thin film electrode layer, the second thin film electrode layer, or the dielectric layer, the interlayer including at least one of a anionized layer or a neutral layer.
20250220961. SEMICONDUCTOR DEVICE (Samsung Electronics ., .)
Abstract: a semiconductor device comprising a first lower interlayer insulating layer, an insulating pattern extending in a first horizontal direction, a first and second plurality of nanosheets stacked apart from one another in a vertical direction, a first gate electrode extending in a second horizontal direction, the first gate electrode surrounding the first plurality of nanosheets, a second gate electrode extending in the second horizontal direction, the second gate electrode surrounding the second plurality of nanosheets, a source/drain region between the first and second gate electrodes, a source/drain contact penetrating the first lower interlayer insulating layer and the insulating pattern, the source/drain contact electrically connected to the source/drain region, and a gate contact penetrating the first lower interlayer insulating layer and the insulating pattern, the gate contact electrically connected to the second gate electrode, at least a portion of a sidewall of the gate contact contacting the source/drain contact.
20250220977. SEMICONDUCTOR DEVICE ELECTRONIC APPARATUS INCLUDING SAME (Samsung Electronics ., .)
Abstract: provided are a semiconductor device and an electronic apparatus including the semiconductor device. the semiconductor device includes a substrate on which a channel layer is provided, an amorphous thin film provided above the substrate, and a gate electrode provided above the amorphous thin film. the amorphous thin film includes an amorphous hfzro(0≤x≤1) layer, and a difference value �e of a d-orbital with respect to hf or zr (an energy difference between an eg orbital and a t2g orbital) satisfies 3.5 ev≤�e<3.8 ev.
20250220979. SEMICONDUCTOR DEVICE (Samsung Electronics ., .)
Abstract: a semiconductor device is provided. the semiconductor device includes a semiconductor layer, an electrode disposed on the semiconductor layer, and a ferroelectric layer arranged between the semiconductor layer and the electrode, the ferroelectric layer including an orthorhombic crystal structure of an oiv phase (space group: pmn21) and doped with a dopant having an ionic radius larger than that of a hafnium ion or an oxygen ion at 2.8 at % or more.
20250220988. SEMICONDUCTOR DEVICES (Samsung Electronics ., .)
Abstract: a semiconductor device includes a plurality of active fins defined by an isolation layer on a substrate, a gate structure on the active fins and the isolation layer, and a gate spacer structure covering a sidewall of the gate structure. a sidewall of the gate structure includes first, second, and third regions having first, second, and third slopes, respectively. the second slope increases from a bottom toward a top of the second region. the second slope has a value at the bottom of the second region less than the first slope. the third slope is greater than the second slope.
20250220996. SEMICONDUCTOR DEVICE (Samsung Electronics ., .)
Abstract: a semiconductor device includes a hydrogen rich layer interposed between a common source layer and an uppermost one of gate electrodes in a cell region, wherein a concentration of hydrogen (h) contained in the hydrogen rich layer is greater than a concentration of hydrogen (h) contained in the gate electrodes. accordingly, hydrogen (h) may be effectively supplied to a channel hole during a high temperature process for forming a cell region. thus, an issue of supply deficiency of hydrogen (h), which may occur according to an increase in the number of layers of a semiconductor device, may be improved, and operation reliability of the semiconductor device may be improved.
Abstract: provided is a semiconductor device. the semiconductor device includes a first electrode, a second electrode spaced apart from the first electrode, a channel between the first electrode and the second electrode, a gate insulating layer in the channel, and a gate electrode on the gate insulating layer. the channel includes a plurality of oxide semiconductor layers spaced apart from each other and a crystallization reduction layer between the plurality of oxide semiconductor layers.
20250221007. SEMICONDUCTOR DEVICE METHOD MANUFACTURING SAME (Samsung Electronics ., .)
Abstract: provided is a semiconductor device. the semiconductor device includes a semiconductor layer including silicon, a first silicide layer in the semiconductor layer, and a second silicide layer provided on the first silicide layer. the first silicide layer includes a metal other than titanium, and the second silicide layer includes tisihaving a c54 crystallization structure. a contact resistance of the semiconductor device may be reduced.
20250221008. SEMICONDUCTOR DEVICE (Samsung Electronics ., .)
Abstract: a semiconductor device includes a channel layer, a barrier layer positioned above the channel layer and having a material with a different energy band gap than the channel layer, source and drain electrodes positioned on the channel layer, a gate electrode positioned above the barrier layer between the source and drain electrodes and a gate semiconductor layer positioned between the barrier layer and the gate electrode. the width of the gate electrode is smaller than the width of the gate semiconductor layer at a junction surface of the gate electrode and the gate semiconductor layer.
Abstract: a semiconductor device includes a semiconductor substrate, a source and a drain provided to be horizontally spaced apart from each other on the semiconductor substrate, a channel layer provided between the source and the drain, a gate insulating layer provided on the channel layer, a gate electrode provided on the gate insulating layer, and a spacer provided to surround the gate electrode, wherein the spacer includes an amorphous boron nitride film.
20250221021. INTEGRATED CIRCUIT DEVICE (Samsung Electronics ., .)
Abstract: an integrated circuit device includes a gate isolation insulator between the fin-type active regions, the gate isolation insulator cutting and separating at least one gate line among the plurality of gate lines. the gate isolation insulator includes a first gate isolation insulating layer embedded in a gate isolation space resulting from cutting the at least one gate line, the first gate isolation insulating layer protruding above a top surface of the at least one gate line in a vertical direction, a second gate isolation insulating layer embedded in a gate recessed hole inwardly recessed from a top surface of the first gate isolation insulating layer, and a third gate isolation insulating layer capping the first gate isolation insulating layer and the second gate isolation insulating layer.
Abstract: a device includes: a plurality of first transistors included in a first current path, in a normal mode, between a first power node to which a positive supply voltage is configured to be applied and a second power node to which a negative supply voltage is configured to be applied; and a first protection transistor connected to a first node which two of the plurality of first transistors are connected to, wherein the first protection transistor is configured to be turned off in the normal mode and to be turned on to provide a protection voltage to the first node in a power down mode.
20250221063. IMAGE SENSOR (Samsung Electronics ., .)
Abstract: an image sensor includes a semiconductor substrate including opposite first and second surfaces, photodiodes within the semiconductor substrate, and driving transistors to generate electrical signals based on outputs from the photodiodes. the driving transistors include a fin-type active region including channel regions corresponding to separate, respective driving transistors, and source-drain regions protruding perpendicularly to the first surface, adjacent source-drain regions at opposite sides of each channel region, and a driving gate electrode to cover a top surface and opposite sidewalls of the fin-type active region. adjacent driving transistors physically share a source-drain region that is between the adjacent driving transistors such that the source-drain region is a source region or a drain region of each of the adjacent driving transistors.
20250221064. PIXEL ARRAY IMAGE SENSOR INCLUDING SAME (Samsung Electronics ., .)
Abstract: a pixel array and an image sensor including the pixel array are provided. the pixel array included in the image sensor includes a plurality of pixels arranged in a matrix, and a plurality of column lines each commonly connected to pixels arranged on a same column from among the plurality of pixels. each of the plurality of pixels includes four subpixels. each of the four subpixels includes four photoelectric conversion devices; a floating diffusion region storing electric charges generated by the four photoelectric conversion devices; and four transmission gates configured to transmit the electric charges generated by the four photoelectric conversion devices to the floating diffusion region. four floating diffusion regions included in the four subpixels are electrically connected to one another via internal wiring. each of the plurality of pixels further includes a reset gate, a first driving gate and a first selection gate.
20250221068. IMAGE SENSOR 3X3 ARRAY PIXELS (Samsung Electronics ., .)
Abstract: an image sensor including first and second pixel groups, each of which includes first to ninth pixels arranged to form a 3�3 array is disclosed. the image sensor further includes first to ninth transfer transistors disposed in each of the pixel groups to correspond to the first to ninth pixels, respectively, each of the first to ninth transfer transistors including a transfer gate and a floating diffusion region, a selection transistor disposed in at least one of the fourth to sixth pixels in each of the pixel group, and source follower transistors respectively disposed in at least two pixels of the first to third and seventh to ninth pixels in each of the pixel groups. source follower gates of the source follower transistors may be connected to the floating diffusion region of each of the first to ninth transfer transistors.
20250221069. CMOS IMAGE SENSING DEVICE (Samsung Electronics ., .)
Abstract: an image sensing device includes: a substrate; and a plurality of pixels isolated by an insulating film disposed within the semiconductor substrate. the plurality of pixels share a first active region, wherein at least one of the plurality of pixels comprises a photoelectronic conversion element and a transfer transistor. the photoelectronic conversion element is connected to the first active region by the transfer transistor. the first active region and a first floating diffusion region are connected by the transfer transistor. the first floating diffusion region is connected to a gate of a source follower transistor, and the first floating diffusion region is connected to a second floating diffusion region through a first transistor. the first transistor is turned off when an operating mode is a first mode. the first transistor is turned on when the operating mode is a second mode different from the first mode.
20250221074. IMAGE SENSOR (Samsung Electronics ., .)
Abstract: an image sensor including a substrate, first pixels in a first pixel group sharing a first micro-lens; second pixels in a second pixel group sharing a second micro-lens; a first pixel isolation pattern surrounding the first pixels; a second pixel isolation pattern surrounding the second pixels; a first guide pattern between the substrate and the first micro-lens and partially overlapping the first pixel isolation pattern; a second guide pattern between the substrate and the first micro-lens and extending toward a central portion; a third guide pattern between the substrate and the second micro-lens and partially overlapping the second pixel isolation pattern; and a fourth guide pattern between the substrate and the second micro-lens and extending toward a central portion. the width of the second guide pattern in the extension direction of the second guide pattern and the width of the fourth guide pattern in the extension direction are different.
20250221075. IMAGE SENSOR ELECTRONIC APPARATUS INCLUDING SAME (Samsung Electronics ., .)
Abstract: provided is an image sensor including a sensor substrate including first, second, third and fourth pixels, and a color separation lens array to separate incident light based on wavelengths and condense the separated incident light onto first, second, third, and fourth pixels, the color separation lens array including a plurality of nanoposts and a peripheral material located around the plurality of nanoposts, and the plurality of nanoposts including a plurality of main posts each having a refractive index greater than a refractive index of the peripheral material and a plurality of sub-posts each having a refractive index less than the refractive index of the peripheral material, and among the first, second, third, and fourth pixel corresponding regions of the color separation lens array, a sub-post fill factor in the second pixel corresponding region being the largest.
20250221076. IMAGE SENSOR (Samsung Electronics ., .)
Abstract: an image sensor includes a substrate including a plurality of pixel areas, a pixel isolation film disposed in the substrate, the pixel isolation film separating the plurality of pixel areas from each other, and each pixel area of the plurality of pixel areas including, a first impurity region, a second impurity region around the first impurity region in a first direction, and an element isolation film between the first impurity region and the second impurity region in the first direction, the element isolation film including, a first insulating layer, a second insulating layer on a first portion of the first insulating layer and formed of a material different from a material of the first insulating layer, and a third insulating layer, a portion of the third insulating layer on the second insulating layer, and a portion of the third insulating layer directly in contact with the first insulating layer.
20250221077. IMAGE SENSOR (Samsung Electronics ., .)
Abstract: an image sensor includes a substrate including pixel regions and having a first surface, a second surface opposite the first surface, and a first trench recessed from the first surface, a shallow device isolation pattern provided in the first trench, and a deep device isolation pattern between the pixel regions and provided in the substrate. the deep device isolation pattern includes a semiconductor pattern penetrating at least a portion of the substrate, and an isolation pattern provided between the substrate and the semiconductor pattern. the isolation pattern includes a first isolation pattern adjacent to the second surface, and a second isolation pattern adjacent to the first surface. a first interface at which the first isolation pattern contacts the second isolation pattern is spaced apart from the shallow device isolation pattern. the first isolation pattern includes a different material from that of the second isolation pattern.
20250221080. IMAGE SENSOR (Samsung Electronics ., .)
Abstract: an image sensor is provided and includes a top layer including a first floating diffusion (fd) wiring structure connected to a fd node, and a first shield structure next to the first fd wiring structure. the image sensor further includes a middle layer bonded to and below the top layer, wherein the middle layer includes a source follower gate, a source follower source region, a second fd wiring structure connected to the first fd wiring structure and the source follower gate, a second shield structure connected to the first shield structure and the source follower source region, and a source follower landing pad between the second shield structure and the source follower source region and spaced apart from the source follower gate.
Abstract: a micro semiconductor chip includes a semiconductor multilayer and at least one electrode on at least one surface of the semiconductor multilayer, wherein the semiconductor multilayer may have a polygonal planar shape and rounded corners.
Abstract: a display module includes a substrate; an anisotropic conductive film on one side of the substrate; a plurality of light-emitting diodes connected to the substrate via the anisotropic conductive film; and a color conversion layer on the plurality of light-emitting diodes and configured to be excited by a light having a first wavelength emitted from the plurality of light-emitting diodes and emit a light of a second wavelength that is different from the first wavelength. the anisotropic conductive film includes: an insulating adhesive layer adhering to the one side of the substrate; a plurality of conductors within the insulating adhesive layer and configured to electrically connect the plurality of light-emitting diodes to the substrate; and a plurality of reflectors within the insulating adhesive layer and having a size less than a size of the plurality of conductors.
Abstract: a light-emitting device and an electronic device including the same. the light-emitting device includes a first electrode, a second electrode facing the first electrode, and an interlayer disposed between the first electrode and the second electrode, wherein the interlayer includes an emission layer and a hole transport region. the hole transport region includes a first layer disposed between the first electrode and the emission layer, the emission layer includes a first compound and an organometallic compound, the organometallic compound includes a transition metal. the first layer includes a first material, and the light-emitting device satisfies condition 1 or condition 2 as described.
Abstract: a display may include: a pixel layer which includes a first region, a second region, a first subpixel disposed in the first region, and a second subpixel disposed in the second region; and a light blocking layer which is disposed on the pixel layer and includes first blocking members disposed on the first subpixel and spaced apart from each other, and second blocking members disposed on the second subpixel and spaced apart from each other, wherein the area of the first subpixel hidden by one of the first blocking members corresponds to the area of the first subpixel hidden by another of the first blocking members, and the area of the second subpixel hidden by one of the second blocking members is different from the area of the second subpixel hidden by another of the second blocking members.
Abstract: disclosed are a polymer including a structural unit represented by chemical formula 1, an organic semiconductor material, and a stretchable polymer thin film and an electronic device including the same.
Abstract: a heterocyclic compound represented by formula 1: